Flash Latency; Table 3-7.Powerpc 60X Bus To Flash Access Timing For Bank B (16-Bit Port) - Motorola MVME2300 Series Installation And Use Manual

and 2 for Bank A factory configuration, or between J15 pins 2 and 3 for
Bank B. When the jumper is installed, the Falcon chipset maps
0xFFF00100 to the Bank B sockets.
The onboard monitor/debugger, PPCBug, resides in the flash chips.
PPCBug provides functionality for:
Under normal operation, the flash devices are in "read-only" mode, their
contents are pre-defined, and they are protected against inadvertent writes
due to loss of power conditions. However, for programming purposes,
programming voltage is always supplied to the devices and the flash
contents may be modified by executing the proper program command
sequence. Refer to the PFLASH command in the PPCBug Debugging
Package User's Manual for further device-specific information on
modifying flash contents.

Flash Latency

There is one 16-bit port bank of flash on the MVME2300. The access times
for this bank are shown in the following table.

Table 3-7.PowerPC 60x Bus to Flash Access Timing for Bank B (16-bit Port)

Access type
4-Beat Read
4-Beat Write
1-Beat Read (2 bytes to 8 bytes)
3-11
Booting the system
Initializing after a reset
Displaying and modifying configuration variables
Running self-tests and diagnostics
Updating firmware ROM
Clock Periods Required for:
1st Beat
68
N/A
68
2nd 3rd 4th
Beat Beat Beat
64 64 64
N/A N/A N/A
- - -
Block Diagram
3
Total
Clocks
260
N/A
68