Introduction; Memory Maps - Motorola MVME2300 Series Installation And Use Manual

Introduction

This chapter provides basic information useful in programming the
MVME2300. This includes a description of memory maps, control and
status registers, PCI arbitration, interrupt handling, sources of reset, and
big/little-endian issues.
For additional programming information about the MVME2300, refer to
the MVME2300 Series VME Processor Module Programmer's Reference
Guide, listed in
For programming information about the PMCs, refer to the applicable
user's manual furnished with the PMCs.

Memory Maps

There are multiple buses on the MVME2300 and each bus domain has its
own view of the memory map. The following sections describe the
MVME2300 memory organization from the following three points of
view:
Additional, more detailed memory maps can be found in the MVME2300
Series VME Processor Module Programmer's Reference Guide.
Appendix D, Related
The mapping of all resources as viewed by the MPU (processor bus
memory map)
The mapping of onboard resources as viewed by PCI local bus
masters (PCI bus memory map)
The mapping of onboard resources as viewed by VMEbus masters
(VMEbus memory map)
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