Table 1.3
Pin Functions (cont)
Pin
No.
Number Pin Name
136
U20
AD26
137
T17
AD25
138
T18
AD24
139
U19
C/
140
T20
AD23
141
R18
AD22
142
T19
AD21
143
N19
VDDQ
144
W19
VSSQ
145
P17
VDD
146
R17
VSS
147
R20
AD20
148
P20
AD19
149
P19
AD18
150
N20
AD17
151
N17
AD16
152
N18
C/
153
M20
154
M19
155
M18
156
M17
157
L18
VDDQ
I/O
Function
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
Power
IO VDD
Power
IO GND
Power
Internal VDD
Power
Internal GND
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
PCI address/
data/port
I/O
Command/
byte enable
I/O
Bus cycle
I/O
Initiator ready
I/O
Target read
I/O
Device select
Power
IO VDD
Reset
SRAM
DRAM
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Rev. 3.0, 04/02, page 29 of 1064
Memory Interface
SDRAM
PCMCIA
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
MPX
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)