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1. Write to DEECON with ECTL1/ECTL0 (DEECON[5:4]) = '10' and correct bit 8 address
2. Write the fill pattern to the DEEDAT register. (Note that if the correct values are
3. Write address bits 7 to 0 to DEEADR. Note that address bits 5 to 0 are ignored.
4. If both the EIEE (IEN1.7) bit and the EA (IEN0.7) bit are logic 1s, wait for the Data
18.7 Data EEPROM Block Fill
The Data EEPROM array can be filled with a predetermined data pattern via polling or
interrupt:
1. Write to DEECON with ECTL1/ECTL0 (DEECON[5:4]) = '11'. Set bit EADR8 = 1.
2. Write the fill pattern to the DEEDAT register.
3. Write any address to DEEADR. Note that the entire address is ignored in a block fill
4. If both the EIEE (IEN1.7) bit and the EA (IEN0.7) bit are logic 1s, wait for the Data
19. Flash memory
19.1 General description
The P89LPC938 Flash memory provides in-circuit electrical erasure and programming.
The Flash can be read and written as bytes. The Sector and Page Erase functions can
erase any Flash sector (1 kB) or page (64 bytes). The Chip Erase operation will erase the
entire program memory. Five Flash programming methods are available. On-chip erase
and write timing generation contribute to a user-friendly programming interface. The
P89LPC938 Flash reliably stores memory contents even after 100,000 erase and program
cycles. The cell is designed to optimize the erase and programming mechanisms.
P89LPC938 uses V
19.2 Features
User manual
to EADR8. (Note that if the correct values are already written to DEECON, there is no
need to write to this register.)
already written to DEEDAT, there is no need to write to this register.)
EEPROM interrupt then read/poll the EEIF (DEECON.7) bit until it is set to logic 1. If
EIEE or EA is logic 0, the interrupt is disabled and only polling is enabled. When EEIF
is logic 1, the operation is complete and row is filled with the DEEDAT pattern.
operation.
EEPROM interrupt then read/poll the EEIF (DEECON.7) bit until it is set to logic 1. If
EIEE or EA is logic 0, the interrupt is disabled and only polling is enabled. When EEIF
is logic 1, the operation is complete.
as the supply voltage to perform the Program/Erase algorithms
DD
•
Parallel programming with industry-standard commercial programmers
•
In-Circuit serial Programming (ICP) with industry-standard commercial programmers.
•
IAP-Lite allows individual and multiple bytes of code memory to be used for data
storage and programmed under control of the end application.
•
Internal fixed boot ROM, containing low-level In-Application Programming (IAP)
routines that can be called from the end application (in addition to IAP-Lite).
•
Default serial loader providing In-System Programming (ISP) via the serial port,
located in upper end of user program memory.
Rev. 03 — 7 June 2005
UM10119
P89LPC938 User manual
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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