Toshiba H1 Series Data Book page 221

32bit micro controller tlcs-900/h1 series
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3.9.3
Setting example
This is in case of using like following condition.
No.
Used as
(a)
Main
Routine
(b)
Character-
ROM
(c)
Sub
Routine
(d)
LCD
Display-RAM
(e)
Stack-
RAM
(a) Main routine (COMMON-Z)
Logical
Physical
Address
Address
C00000H
<-(Same)
C000xxH
<-
C000yyH
<-
From No.2 to No.8 instructions are setting of Ports and Memory controller.
No.9 is a setting for stack pointer. It is assigned to internal-RAM.
No.10 is a setting to execute for No.12's instruction.
No.12 is an instruction to call sub routine. When CPU outputs 400000H address, MMU will convert and output 000000H
physical address to external address bus: A23 to A0. And
in an area for CS1 at the same time. By these instructions, CPU cans brunch to sub-routine.
(Note: This example is based on sub routine program is already written on SRAM.)
Memory
Setting
NOR-Flash
CSZA
(16MB, 1pcs)
32bit,
1wait
SRAM
CS
(16MB, 1pcs)
16bit,
0wait
Internal-RAM
----
(288KB)
(32bit,
2-1-1-1clk)
No
Instruction
1
org
C00000H
2
ldw
(mamr2),80FFH
3
ldw
(b2csl), C222H
4
ldw
(mamr1),40FFH
5
ldw
(b1csl), 8111H
5.1
ldw
(localpz),8000H
5.2
ldw
(localrz),8000H
6
ld
(p8fc), 02H
7
ld
(p8fc2), 04H
9
ld
xsp,48000H
10
ldw
(localpy),8000H
11
:
12
call
400000H
13
:
14
:
15
:
92CZ26A-218
MMU-area
COMMON-Z
,
Bank0 in
LOCAL-Z
Bank0 in
,
1
LOCAL-Y
Bank1 in
LOCAL-Y
Bank2 in
LOCAL-Y
;
; CS2 800000-ffffff/8MB
; CS2 32bit ROM, 1wait
; CS1 400000-7fffff/4MB
; CS1 16bit RAM, 0wait
; Enable LOCAL-Z Bank for program
; Enable LOCAL-Z Bank for read-data
;
;
; Stack Pointer = 48000H
; Bank0 in LOCAL-Y is set as Program bank
for sub routine
;
; Call Sub routine
;
;
;
CS for SRAM will be asserted because of logical address is
1
TMP92CZ26A
Logical
Physical
address
address
C00000H to
FFFFFFH
800000H to
000000H to
BFFFFFH
3FFFFFH
400000H to
000000H to
5FFFFFH
1FFFFFH
200000H to
3FFFFFH
002000H to
049FFFH
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