Toshiba H1 Series Data Book page 110

Sample 4) Calculation example for CPU + LDMA+ ARDMA + HDMA
Conditions:
CPU operation speed (f
Display RAM
Display quality
Refresh rate
SDRAM Auto Refresh
SDRAM
HDMA
Calculation example:
t (LDMA)
STOP
LHSYNC [period: s]
t (HDMA)
STOP
LCD driver data transfer time [s]
Since LHSYNC [period: s] < LCD driver data transfer time [s], this setting is not possible.
When the transfer speed is changed to x4, the LCD driver data transfer time is calculated as follows:
(The transfer speed should be adjusted according to the required specifications.)
LCD driver data transfer time [s]
= SegNum × (1/f
= 320 × (1 / 60MHz) × 4 = 21.3 [ μ s]
LHSYNC [period: s] − LCD driver data transfer time [s] − t
= 54.95 [ μ s] − 21.3 [ μ s] − 2.68 [ μ s] = 30.94 [ μ s]
To realize proper LCD display, the maximum time HDMA can occupy the bus at a time (maximum HDMA time) must
be set to 30.92 [ μ S] or less. Although transferring all 5 Kbytes from the internal RAM to I2S requires t
[ μ s], the maximum HDMA time should be limited by using the HDMATR register.
) : 60 MHz
SYS
: QVGA (320seg × 240com)
: 65536 colors (TFT)
: 70 Hz (including 20 clocks of dummy cycles)
: Every 936 states (15.6 μ s)
: 16-bit width
: Transfers 5 Kbytes from internal RAM to I2S
= ((SegNum × K / 8) × tLRD) + (1 / f
= ((320 × 16 / 8) × 1 / f [Hz] / 4) + (1 / f
SYS
= ((640) × 16.67 [ns] / 4) + 16.67 [ns]
= 2.68 [ μ s]
= 1/70 [Hz] /(COM + 20 = 260) = 54.95 [ μ s]
= (((1 + 2) × 16) × 80) + 80 + 160) / f
= SegNum × (1/f ) × (LD bus transfer speed)
SYS
= 320 × (1/60 MHz) × 16 = 85 [ μ s]
) × (LD bus transfer speed)
SYS
92CZ26A-107
[Hz])
SYS
[Hz])
SYS
[s] = 68 [ μ s]
SYS
(LDMA)
STOP
TMP92CZ26A
(HDMA) = 68
STOP