Toshiba H1 Series Data Book page 243

3.11.2 Operation Description
3.11.2.1 Accessing NAND Flash Memory
The NDFC accesses data on NAND Flash memory indirectly through its internal
registers. This section explains the operations for accessing the NAND Flash.
Since no dedicated sequencer is provided for generating commands to the NAND Flash,
the levels of the NDCLE, NDALE, and
NDCLE
NDALE
NDCE
NDRE
NDWE
NDR/B
D15 ∼ D0
NDFMCR0<CLE> = 1
NDFMCR0<CE0> = 1
NDFMCR0<CLE> = 0
NDFMCR0<ALE> = 1
Figure 3.11.2 Basic Timing for Accessing NAND Flash
92CZ26A-240
pins must be controlled by software.
NDCE
TMP92CZ26A
ND0FMCR<ALE> = 0