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Status and Events
Status Byte Register
(SBR)
3 2
The SBR is made up of 8 bits. Bits 4, 5 and 6 are defined in accordance with
IEEE Std 488.2-1987 (see Figure 3-1 and Table 3-1). These bits are used to
monitor the output queue, SESR and service requests, respectively. The contents
of this register are returned when the *STB? query is used.
6
RQS
7
5
4
3
ESB MAV
OSB
6
MSS
Figure 3 1: The Status Byte Register (SBR)
Table 3 1: SRB bit functions
Bit
Function
7
Summary of the operation status register.
6
RQS (Request Service)/MSS (Master Status Summary). When the instrument
is accessed using the GPIB serial poll command, this bit is called the Request
Service (RQS) bit and indicates to the controller that a service request has
occurred (in other words, that the GPIB bus SRQ line is LOW). The RQS bit is
cleared when serial poll ends.
When the instrument is accessed using the *STB? query, this bit is called the
Master Status Summary (MSS) bit and indicates that the instrument has issued
a service request for one or more reasons. The MSS bit is never cleared to 0 by
the *STB? query.
5
Event Status Bit (ESB). This bit indicates whether or not a new event has
occurred after the previous Standard Event Status Register (SESR) has been
cleared or after an event readout has been performed.
4
Message Available Bit (MAV). This bit indicates that a message has been
placed in the output queue and can be retrieved.
3
Summary of the Questionable Status Byte register.
2
Summary of the Error Event Queue
1-0
Not used
2
1
0
QSB EEQ
3026 Programmer Manual
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