Uart Status Registers (Usrn); Usrn Field Descriptions - Motorola ColdFire MCF5281 User Manual

Bits Name
3–0 SB Stop-bit length control. Selects the length of the stop bit appended to the transmitted character. Stop-bit lengths of
9/16th to 2 bits are programmable for 6–8 bit characters. Lengths of 1 1/16th to 2 bits are programmable for 5-bit
characters. In all cases, the receiver checks only for a high condition at the center of the first stop-bit position, that
is, one bit time after the last data bit or after the parity bit, if parity is enabled. If an external 1x clock is used for the
transmitter, clearing bit 3 selects one stop bit and setting bit 3 selects two stop bits for transmission.
SB
0000
0001
0010
0011

23.3.3 UART Status Registers (USRn)

The USRn registers, shown in Figure 23-4, show the status of the transmitter, the receiver,
and the FIFO.
7
Field RB
Reset
R/W
Address
Table 23-4 describes USRn fields.
Bits Name
7 RB Received break. The received break circuit detects breaks that originate in the middle of a received character.
However, a break in the middle of a character must persist until the end of the next detected character time.
0 No break was received.
1 An all-zero character of the programmed length was received without a stop bit. RB is valid only when
RxRDY = 1. Only a single FIFO position is occupied when a break is received. Further entries to the FIFO
are inhibited until RXD returns to the high state for at least one-half bit time, which is equal to two
successive edges of the UART clock. RB is valid only when RxRDY = 1.
6 FE Framing error.
0 No framing error occurred.
1 No stop bit was detected when the corresponding data character in the FIFO was received. The stop-bit
check occurs in the middle of the first stop-bit position. FE is valid only when RxRDY = 1.
MOTOROLA
Table 23-3. UMR2n Field Descriptions (continued)
5 Bits 6–8 Bits SB
1.063 0.563 0100
1.125 0.625 0101
1.188 0.688 0110
1.250 0.750 0111
6 5
FE PE
IPSBAR + 0x204 (USR0), 0x244 (USR1), 0x284 (USR2)
Figure 23-4. UART Status Register (USRn)
Table 23-4. USRn Field Descriptions
Chapter 23. UART Modules
Description
5 Bits 6–8 Bits SB
1.313 0.813 1000
1.375 0.875 1001
1.438 0.938 1010
1.500 1.000 1011
4 3
OE TxEMP TxRDY
0000_0000
Read only
Description
Register Descriptions
5–8 Bits SB 5–8 Bits
1.563 1100 1.813
1.625 1101 1.875
1.688 1110 1.938
1.750 1111 2.000
2 1
FFULL RxRDY
0
23-7