31
Field
Reset
R/W
15
Field
Reset
R/W
Figure 10-1. Interrupt Pending Register High (IPRHn)
Bits
Name
31–0
INT
Interrupt pending. Each bit corresponds to an interrupt source. The corresponding IMRHn bit
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRHn samples the signal generated by the interrupting source. The corresponding IPRHn bit
reflects the state of the interrupt signal even if the corresponding IMRHn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
.
31
Field
Reset
R/W
15
Field
Reset
R/W
Figure 10-2. Interrupt Pending Register Low (IPRLn)
Bits
Name
31–1
INT
Interrupt Pending. Each bit corresponds to an interrupt source. The corresponding IMRLn bit
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRLn samples the signal generated by the interrupting source. The corresponding IPRLn bit reflects
the state of the interrupt signal even if the corresponding IMRLn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
0
—
Reserved, should be cleared.
MOTOROLA
INT[63:48]
0000_0000_0000_0000
INT[47:32]
0000_0000_0000_0000
IPSBAR + 0xC00, 0xD00
Table 10-4. IPRHn Field Descriptions
INT[31:16]
0000_0000_0000_0000
INT[16:1]
0000_0000_0000_0000
IPSBAR + 0xC04, 0xD04
Table 10-5. IPRLn Field Descriptions
Chapter 10. Interrupt Controller Modules
R
R
Description
R
R
Description
Register Descriptions
16
0
16
1
0
—
10-7