Mpark Field Description - Motorola ColdFire MCF5281 User Manual

Bits Name
31–26 —
25 M2_P_EN
24 BCR24BIT
23–22 M3_PRTY
21–20 M2_PRTY
19–18 M0_PRTY
17–16 M1_PRTY
15 —
14 FIXED
13 TIMEOUT
12 PRKLAST
11–8 LCKOUT_TIME Lock-out Time. Lock-out time for a master being denied the bus.
7–0 —
The initial state of the master priorities is M3 > M2 > M1 > M0. System software should
guarantee that the programmed Mn_PRTY fields are unique, otherwise the hardware
defaults to the initial-state priorities.
MOTOROLA
Table 8-7. MPARK Field Description
Reserved, should be cleared.
DMA bandwith control enable
0 disable the use of the DMA's bandwidth control to elevate the priority of its bus requests.
1 enable the use of the DMA's bandwidth control to elevate the priority of its bus requests.
Enables the use of 24 bit byte count registers in the DMA module
0 DMA BCRs function as 16 bit counters.
1 DMA BCRs function as 24 bit counters.
Master priority level for master 3 (Fast Ethernet Controller)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Master priority level for master 2 (DMA Controller)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Master priority level for master 0 (ColdFire Core)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Master priority level for master 1 (Not used in user mode)
00 fourth (lowest) priority
01 third priority
10 second priority
11 first (highest) priority
Reserved, should be cleared.
Fixed or round robin arbitration
0 round robin arbitration
1 fixed arbitration
Timeout Enable
0 disable count for when a master is locked out by other masters.
1 enable count for when a master is locked out by other masters and allow access when
LCKOUT_TIME is reached.
Park on the last active master or highest priority master if no masters are active
0 park on last active master
1 park on highest priority master
The lock out time is defined as 2^ LCKOUT_TIME[3:0].
Reserved, should be cleared.
Chapter 8. System Control Module (SCM)
Internal Bus Arbitration
Description
8-13