Usage Notes On Watchdog Reset And External Start - Philips LPC2194 User Manual

Philips Semiconductors
ARM-based Microcontroller
Watchdog Feed Register (WDFEED - 0xE0000008)
Writing 0xAA followed by 0x55 to this register will reload the Watchdog timer to the WDTC value. This operation will also start
the Watchdog if it is enabled via the WDMOD register. Setting the WDEN
enable the Watchdog. A valid feed sequence must first be completed before the Watchdog is capable of generating an interrupt/
reset. Until then, the Watchdog will ignore feed errors. Once 0xAA is written to the WDFEED register the next operation in the
Watchdog register space should be a WRITE (0x55) to the WDFFED register otherwise the Watchdog is triggered. The interrupt/
reset will be generated during the second pclk following an incorrect access to a watchdog timer register during a feed sequence.
Table 195: Watchdog Feed Register (WDFEED - 0xE0000008)
WDFEED Function
7:0 Feed
Watchdog Timer Value Register (WDTV - 0xE000000C)
The WDTV register is used to read the current value of Watchdog timer.
Table 196: Watchdog Timer Value Register (WDTV - 0xE000000C)
WDTV Function
31:0 Count

USAGE NOTES ON WATCHDOG RESET AND EXTERNAL START

When LPC2292/2294 is conditioned by components attached to the BOOT1:0 pins to start execution in off-chip memory, and is
programmed to enable the Watchdog Timer to reset the part if it is not periodically serviced, care must be taken to avoid problems
due to the interaction of these features. First, the BOOT1 and/or BOOT0 pin(s) must be biased to ground using pulldown
resistors, not transistors driven from RESET low, because RESET is not driven low during a Watchdog Reset. Second, if either
or both of the BOOT1:0 pins are used as inputs in the application, the application designer must ensure that the external driver
will not be enabled during an internal Reset generated by the Watchdog Timer. (One way to do this is to use one of the CS3:0
outputs to enable the driver.) If these two conditions cannot be met, an external Watchdog facility can be used.
Watchdog
Feed value should be 0xAA followed by 0x55
Current timer value
LPC2119/2129/2194/2292/2294
bit in the WDMOD register is not sufficient to
Description
Description
259
Preliminary User Manual
Reset
Value
undefined
Reset
Value
0xFF
May 03, 2004