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Another example of a variant branch instruction would be a JMP (A0) instruction.
Figure 29-3 shows the PST and DDATA outputs that indicate a JMP (A0) execution
(assuming the CSR was programmed to display the lower 2 bytes of an address).
CLKOUT
PST
0x5
DDATA
0x0
Figure 29-3. Example JMP Instruction Output on PST/DDATA
PST 0x5 indicates a taken branch and the marker value 0x9 indicates a 2-byte address.
Thus, the subsequent 4 nibbles of DDATA display the lower 2 bytes of address register A0
in least-to-most-significant nibble order. The PST output after the JMP instruction
completes depends on the target instruction. The PST can continue with the next instruction
before the address has completely displayed on DDATA because of the DDATA FIFO. If
the FIFO is full and the next instruction has captured values to display on DDATA, the
pipeline stalls (PST = 0x0) until space is available in the FIFO.
29.4 Programming Model
In addition to the existing BDM commands that provide access to the processor's registers
and the memory subsystem, the debug module contains 19 registers to support the required
functionality. These registers are also accessible from the processor's supervisor
programming model by executing the WDEBUG instruction (write only). Thus, the
breakpoint hardware in the debug module can be written by the external development
system using the debug serial interface or by the operating system running on the processor
core. Software is responsible for guaranteeing that accesses to these resources are serialized
and logically consistent. Hardware provides a locking mechanism in the CSR to allow the
external development system to disable any attempted writes by the processor to the
breakpoint registers (setting CSR[IPW]). BDM commands must not be issued if the
MCF5282 is using the WDEBUG instruction to access debug module registers or the
resulting behavior is undefined.
These registers, shown in Figure 29-4, are treated as 32-bit quantities, regardless of the
number of implemented bits.
MOTOROLA
0x9
default
0x0
A[3:0]
Chapter 29. Debug Support
default
default
A[7:4]
A[11:8]
Programming Model
default
A[15:12]
29-5
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