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— For unsigned word and longword operations, a zero is shifted into the product on
right shifts.
— For signed, word operations, the sign bit is shifted into the product on right shifts
unless the product is zero. For signed, longword operations, the sign bit is shifted
into the product unless an overflow occurs or the product is zero, in which case
a zero is shifted in.
— For all left shifts, a zero is inserted into the lsb position.
The following pseudocode explains basic MAC or MSAC instruction functionality. This
example is presented as a case statement covering the three basic operating modes with
signed integers, unsigned integers, and signed fractionals. Throughout this example, a
comma-separated list in curly brackets, {}, indicates a concatenation operation.
switch (MACSR[6:5])
{
case 0:
if (MACSR.OMC == 0 || MACSR.PAVx == 0)
then {
MACSR.PAVx = 0
/* select the input operands */
if (sz == word)
/* perform the multiply */
product[63:0] = operandY[31:0] * operandX[31:0]
/* check for product overflow */
if ((product[63:39] != 0x0000_00_0) && (product[63:39] != 0xffff_ff_1))
0
MOTOROLA
/* MACSR[S/U, F/I] */
/* signed integers */
then {if (U/Ly == 1)
then operandY[31:0] = {sign-extended Ry[31], Ry[31:16]}
else operandY[31:0] = {sign-extended Ry[15], Ry[15:0]}
if (U/Lx == 1)
then operandX[31:0] = {sign-extended Rx[31], Rx[31:16]}
else operandX[31:0] = {sign-extended Rx[15], Rx[15:0]}
}
else {operandY[31:0] = Ry[31:0]
operandX[31:0] = Rx[31:0]
}
then {
/* product overflow */
MACSR.PAVx = 1
MACSR.V = 1
if (inst == MSAC && MACSR.OMC == 1)
then if (product[63] == 1)
then result[47:0] = 0x0000_7fff_ffff
else result[47:0] = 0xffff_8000_0000
else if (MACSR.OMC == 1)
then /* overflowed MAC,
Chapter 3. Enhanced Multiply-Accumulate Unit (EMAC)
EMAC Instruction Set Summary
saturationMode enabled */
if (product[63] == 1)
then result[47:0] = 0xffff_8000_000
else result[47:0] = 0x0000_7fff_fff
3-15
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