Arbiter Overview; Chassis Interface Overview - Cisco 7500 Series Configuration Manual

Arbiter Overview

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Arbiter Overview
In the Cisco 7500 series routers, an internal printed circuit board called the arbiter arbitrates traffic on
the CyBus and generates the CyBus clock.
The Cisco 7505 has a single arbiter, whereas the Cisco 7507 and Cisco 7513 have a dual arbiter for the
dual CyBuses. The Cisco 7576 includes two dual arbiters, one for router A and one for router B. The
arbiter is attached directly to the front (noninterface processor side) of the system backplane. It controls
traffic across each CyBus by prioritizing access requests from interface processors to ensure that each
request is processed and to prevent any interface processor from jeopardizing each CyBus and
interfering with the ability of the other interface processors to access the RSP.
The arbiter provides the following services for the system:
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Note The Cisco 7507-MX, Cisco 7513-MX, and some models of the Cisco 7507 and Cisco 7513 ship with
the Cisco turbo arbiter. The turbo arbiter, when used in conjunction with other future hardware,
significantly increases system bandwidth. When not used with this future hardware, the turbo arbiter
operates in standard CyBus mode. Refer to Replacing the Dual Arbiter or
Turbo Arbiter in Cisco 7500 Series Routers publication for details on how to identify whether or not your
Cisco 7507 or Cisco 7513 includes a turbo arbiter.

Chassis Interface Overview

The Cisco 7500 series routers have an internal printed board called the chassis interface (CI) that
provides the environmental and power supply monitoring functions for the router. (See
Note The CI is available as a FRU. The Cisco 7576 includes two chassis interfaces, one for router A and
one for router B.
Cisco 7500 Series Installation and Configuration Guide
1-50
For the Cisco 7513, Cisco 7513-MX, and Cisco 7576, see the
7513-MX, and Cisco 7576 Power Supplies" section on page
CyBus clock generation—Generates the internal system clock and provides a private copy of the
clock to the RSP and each interface processor.
CyBus arbitration—Arbitrates interface processor requests to transmit commands on the CyBus.
The arbitration is based on a round-robin priority scheme to ensure that all interface processors have
access to a known portion of each CyBus's bandwidth.
Global lock arbitration—Arbitrates interface processor and RSP requests for the global lock, a
synchronization primitive used to control RSP and interface processor access to shared data
structures.
Chapter 1 Cisco 7500 Series Product Overview
"Removing Cisco 7513, Cisco
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