Table 2-15 Jtag/Once Interface - Motorola DSP56305 User Manual

24-bit digital signal processor
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Signal/Connection Descriptions
JTAG/OnCE Interface
2.13
JTAG/ONCE INTERFACE
Signal
Type
Name
TCK
Input
TDI
Input
TDO
Output
TMS
Input
TRST
Input
2-38

Table 2-15 JTAG/OnCE Interface

State
During
Reset
Input
Test Clock—TCK is a test clock input signal
used to synchronize the JTAG test logic.
This input is 5 V tolerant.
Input
Test Data Input—TDI is a test data serial input
signal used for test instructions and data. TDI
is sampled on the rising edge of TCK and has
an internal pull-up resistor.
This input is 5 V tolerant.
Tri-stated
Test Data Output—TDO is a test data serial
output signal used for test instructions and
data. TDO is tri-statable and is actively driven
in the shift-IR and shift-DR controller states.
TDO changes on the falling edge of TCK.
Input
Test Mode Select—TMS is an input signal
used to sequence the test controller's state
machine. TMS is sampled on the rising edge of
TCK and has an internal pull-up resistor.
This input is 5 V tolerant.
Input
Test Reset—TRST is an active-low
Schmitt-trigger input signal used to
asynchronously initialize the test controller.
TRST has an internal pull-up resistor. TRST
must be asserted after power up. Always assert
TRST immediately after power-up.
This input is 5 V tolerant.
DSP56305 User's Manual
Signal Description
MOTOROLA

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