Table 6-11 Hi32 Programming Model - Host Side Registers - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
HOST SIDE Programming Model
6.6 HOST SIDE PROGRAMMING MODEL
The HI32 appears to the host processor as a bank of registers.

Table 6-11 HI32 Programming Model - Host Side Registers

Register
Acronym
HCTR Host Interface Control Register
HSTR Host Interface Status Register
HCVR Host Command Vector Register
HRXM Host Master Receive Data FIFO
HRXS Host Slave Receive Data FIFO
HTXR Host Transmit Data FIFO
CDID/CVID Device ID/Vendor ID Configuration Register
CSTR/CCMR Status/Command Configuration Register
CCCR/CRID Class Code/Revision ID Configuration Register
CHTY/CLAT Header Type/Latency Timer Configuration Register
CBMA Memory Space Base Address Configuration Register
CILP Interrupt Line -Interrupt Signal Configuration Register
Note: The HRXM is used by the HI32, as the PCI master, to output data, and cannot actually be
accessed by the host bus.
In the Universal Bus modes:
• The HI32 occupies eight words in the host processor address space (see
Figure 6-4). The PCI configuration registers (CDID/CVID, CSTR/CCMR,
CCCR/CRID, CHTY/CLAT, CBMA and CILP) cannot be accessed by the host
processor in the Universal Bus modes.
• Due to the fast DSP56300 core interrupt response, most host microprocessors can
read or write data at their maximum programmed non-DMA instruction rate
without testing the handshake flags for each transfer. If the full interrupt driven
handshake is not needed, the high speed data transfer between the host and the
HI32 may be supported with only host data strobe/acknowledge handshake
mechanism. DMA hardware may be used with the handshake flags to transfer
data without host processor intervention.
• When operating with a host bus less than 24 bits wide, the data signals that are
not used for transferring data must be forced or pulled up or down to Vcc or to
GND respectively. For example: when operating with a 16-bit bus (e.g. ISA bus),
HP48-HP41 must be forced or pulled up to Vcc or pulled down to GND.
6-48
Register Name
DSP56305 User's Manual
Register Type
Control, status,
vector and data
registers, and FIFOs
PCI configuration
registers
MOTOROLA