Single-Strobe Pin Configuration; Rtos Program; Interrupt Sources And Priorities - Motorola DSP56305 User Manual

4.3.11 Mode F: Bootstrap Through HI32 in 8-Bit-Wide UB Mode in

Single-Strobe Pin Configuration

Mode MODD
F 1
The program stored at the hardware reset vector, after testing MODA, MODB, MODC,
and MODD, bootstraps through HI32 in UB slave single-strobe (HRW, HDS)
configuration. The DSP56305 is written with 24-bit wide words broken into 8-bit wide
host bus transfers. This mode may be used for booting from various microprocessors or
microcontrollers.
4.4

RTOS PROGRAM

The RTOS program is factory-programmed in an internal 6144-words by 24-bit RTOS
ROM located in P memory space at locations $FF0800–$FF1FFF. When exiting reset, the
DSP56305 samples MODA, MODB, MODC, and MODD to determine the reset vector
location. Except for modes 0 and 8, program execution begins from the internal P
memory location $FF0000, which is the bootstrap ROM location. The bootstrap program
first tests the MD bit in the Operating Mode Register (OMR), and if it is cleared, jumps to
the RTOS ROM location $FF0800. The RTOS Program then tests the MA, MB, and MC
bits in the OMR to determine the program flow.
4.5

INTERRUPT SOURCES AND PRIORITIES

Interrupt handling by the DSP56305, like that of all DSP56300 family members, has been
optimized for DSP applications. Refer to Section 7 of the DSP56300 Family Manual. The
interrupt table is located in the 256 locations of program memory pointed to by the
Vector Base Address (VBA) register in the Program Control Unit.
MOTOROLA
MODC MODB MODA
1 1
DSP56305 User's Manual
Reset
Vector
1 $FF0000 Bootstrap through HI32 in
8-bit-wide UB mode in
single-strobe pin
configuration
Core Configuration
RTOS Program
Description
4-11