Interrupt Wakeup Register; 0Xe01F C144); External Interrupt Mode Register (Extmode - 0Xe01F C148) - Philips LPC213 Series User Manual

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Philips Semiconductors
Volume 1
3.5.3 Interrupt Wakeup register (INTWAKE - 0xE01F C144)
Enable bits in the INTWAKE register allow the external interrupts to wake up the
processor if it is in Power-down mode. The related EINTn function must be mapped to the
pin in order for the wakeup process to take place. It is not necessary for the interrupt to be
enabled in the Vectored Interrupt Controller for a wakeup to take place. This arrangement
allows additional capabilities, such as having an external interrupt input wake up the
processor from Power-down mode without causing an interrupt (simply resuming
operation), or allowing an interrupt to be enabled during Power-down without waking the
processor up if it is asserted (eliminating the need to disable the interrupt if the wakeup
feature is not desirable in the application).
For an external interrupt pin to be a source that would wake up the microcontroller from
Power-down mode, it is also necessary to clear the corresponding bit in the External
Interrupt Flag register
Table 9:
Bit
0
1
2
3
13:4
14
15

3.5.4 External Interrupt Mode register (EXTMODE - 0xE01F C148)

The bits in this register select whether each EINT pin is level- or edge-sensitive. Only pins
that are selected for the EINT function (see chapter Pin Connect Block on page 73) and
enabled via the VICIntEnable register
(VICIntEnable - 0xFFFF F010)" on page
Interrupt function (though of course pins selected for other functions may cause interrupts
from those functions).
Note: Software should only change a bit in this register when its interrupt is
disabled in the VICIntEnable register, and should write the corresponding 1 to the
EXTINT register before enabling (initializing) or re-enabling the interrupt, to clear
the EXTINT bit that could be set by changing the mode.
User manual
(Section 3.5.2 on page
Interrupt Wakeup register (INTWAKE - address 0xE01F C144) bit description
Symbol
Description
EXTWAKE0
When one, assertion of EINT0 will wake up the processor from
Power-down mode.
EXTWAKE1
When one, assertion of EINT1 will wake up the processor from
Power-down mode.
EXTWAKE2
When one, assertion of EINT2 will wake up the processor from
Power-down mode.
EXTWAKE3
When one, assertion of EINT3 will wake up the processor from
Power-down mode.
-
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
BODWAKE
When one, a BOD interrupt will wake up the processor from
Power-down mode.
RTCWAKE
When one, assertion of an RTC interrupt will wake up the
processor from Power-down mode.
Rev. 01 — 24 June 2005
Chapter 3: System Control Block
20).
(Section 5.4.4 "Interrupt Enable register
52) can cause interrupts from the External
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
UM10120
Reset
value
0
0
0
0
NA
0
0
22

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