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Philips Semiconductors
Volume 1
Table 115: Example I
I2SCLL +
I2SCLH
8
10
25
50
100
160
200
400
800
2
11.8 Details of I
The four operating modes are:
Data transfers in each mode of operation are shown in Figures
abbreviations used in these figures when describing the I
Table 116: Abbreviations used to describe an I
Abbrevation
S
SLA
R
W
A
A
Data
P
In Figures
numbers in the circles show the status code held in the I2STAT register. At these points, a
service routine must be executed to continue or complete the serial transfer. These
service routines are not critical since the serial transfer is suspended until the serial
interrupt flag is cleared by software.
When a serial interrupt routine is entered, the status code in I2STAT is used to branch to
the appropriate service routine. For each status code, the required software action and
details of the following serial transfer are given in tables from
User manual
2
C clock rates
1
5
125
100
40
200
20
100
10
50
6.25
31.25
5
25
2.5
12.5
1.25
6.25
C operating modes
•
Master Transmitter
•
Master Receiver
•
Slave Receiver
•
Slave Transmitter
Explanation
Start Condition
7-bit slave address
Read bit (high level at SDA)
Write bit (low level at SDA)
Acknowledge bit (low level at SDA)
Not acknowledge bit (high level at SDA)
8-bit data byte
Stop condition
29
to 33, circles are used to indicate when the serial interrupt flag is set. The
Rev. 01 — 24 June 2005
2
I
C Bit Frequency (kHz) at PCLK (MHz)
10
16
400
200
320
100
160
62.5
100
50
80
25
40
12.5
20
2
C operation
UM10120
2
Chapter 11: I
C interfaces
20
40
60
400
200
400
125
250
375
100
200
300
50
100
150
25
50
75
29
to 33.
Table 116
2
C operating modes.
Table 120
to
Table
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
lists
124.
123
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