Table 3-4. Pci Originated Bandwidth Matrix - Motorola MVME2400 Series Installation And Use Manual

Functional Description
3
Transaction
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
3-8

Table 3-4. PCI Originated Bandwidth Matrix

First 2 First 4
Cache Lines Cache Lines
MBytes
Clks Clks
sec
10 213 18
16 133 24
18 118 34
24 89 40
10 427 18
19 225 27
18 237 34
28 152 44
10 213 18
16 133 24
18 118 34
24 89 40
10 213 18
18 118 26
18 118 34
26 82 42
10 427 18
23 186 34
18 237 34
31 138 47
First 6
Cache Lines
MBytes MBytes
Clks
sec sec
237 26 246
178 32 200
125 50 128
107 56 114
474 26 492
316 37 346
251 50 256
194 60 213
237 26 246
178 32 200
125 50 128
107 56 114
237 26 246
164 34 188
125 50 128
102 58 110
474 30 427
251 46 278
251 50 256
182 63 203
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Continuous
Clock
Ratio
Clks/ MBytes
Line sec
4 266 5:2
4 266
8 133
8 133
4 533 3:2
4 533
8 267
8 267
4 266 3:1
4 266
8 133
8 133
4 266 2:1
4 266
8 133
8 133
5 427 1:1
5.5 388
8 267
8 267