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Board Level Hardware Description
1
Address Range
$FFF00000 - $FFF3FFFF
$FFF40000 - $FFF400FF
$FFF40100 - $FFF401FF
$FFF40200 - $FFF40FFF
$FFF41000 - $FFF41FFF
$FFF42000 - $FFF42FFF
$FFF43000 - $FFF430FF
$FFF43100 - $FFF431FF
$FFF43200 - $FFF43FFF
$FFF44000 - $FFF44FFF
$FFF45000 - $FFF457FF
$FFF45800 - $FFF45FFF
$FFF46000 - $FFF46FFF
$FFF47000 - $FFF47FFF
$FFF48000 - $FFF57FFF
$FFF58000 - $FFF5807F
$FFF58080 - $FFF580FF
$FFF58100 - $FFF5817F
$FFF58180 - $FFF581FF
1-30
The IP2 chip on the MVME162LX supports up to four
Note
IP interfaces, designated IP_a through IP_d. The
700/800-series MVME162LX itself accommodates two
IPs: IP_a and IP_b. In the following map, the segments
applicable to IP_c and IP_d are not used in the 700/800-
series MVME162LX.
Table 1-5. Local I/O Devices Memory Map
Devices Accessed
Reserved
VMEchip2 (LCSR)
VMEchip2 (GCSR)
Reserved
Reserved
MC2chip
MCECC #1
MCECC #2
MCECCs (repeated)
Reserved
SCC #1 (Z85230)
SCC #2 (Z85230)
LAN (82596CA)
SCSI (53C710)
Reserved
IP2 IP_a I/O
IP2 IP_a ID
IP2 IP_b I/O
IP2 IP_b ID Read
Port
Size
Notes
Width
- -
256KB
4
D32
256B
1, 3
D32-D8
256B
1, 3
- -
3.5KB
4, 5
- -
4KB
4
D32-D8
4KB
1
D8
256B
1, 8
D8
256B
1, 8
- -
3.5KB
1, 5, 8
- -
8KB
4
D8
2KB
1, 2
D8
2KB
1, 2
D32
4KB
1, 6
D32-D8
4KB
1
- -
64KB
4
D16
128B
1
D16
128B
1
D16
128B
1
D16
128B
1
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