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Timer/Counter2 and Timer/Counter3 are functionally identical except for the peripheral
base address.
16.1 Features
16.2 Applications
16.3 Description
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally-supplied clock, and it can optionally generate interrupts or perform other actions
at specified timer values, based on four match registers. It also includes four capture
inputs to trap the timer value when an input signal transitions, optionally generating an
interrupt.
Due to the limited number of pins on the LPC2101/02/03, none of the Capture Inputs of
Timer3, only three of the Capture Inputs of Timer2, three of the Match Ouputs of Timer2,
and four of the Match Outputs of Timer3 are connected to device pins.
User manual
UM10161
Chapter 16: Timer/Counter Timer2 and Timer3
Rev. 01 — 12 January 2006
•
A 16-bit Timer/Counter with a programmable 16-bit Prescaler.
•
Counter or Timer operation
•
Three (Timer 2) 16-bit capture channels that can take a snapshot of the timer value
when an input signal transitions. A capture event may also optionally generate an
interrupt.
•
Four 16-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
•
Up to four (Timer3) and three (Timer2) external outputs corresponding to match
registers with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
•
For each timer, up to four match registers can be configured as PWM allowing to use
up to three match outputs as single edge controlled PWM ouputs.
•
Interval Timer for counting internal events
•
Pulse Width Demodulator via Capture inputs
•
Free running timer
•
Pulse Width Modulator via Match outputs
Rev. 01 — 12 January 2006
User manual
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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