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The last 8k portion of the HRAM board, EOOOH through
FFFFH, may be enabled in a manner different than that
described above, depending upon the setting of the
Memory Address switches (see Section 3.3).
3.2.2
Designating I/O Port Control Bits
The user can choose any one of the six available I/O
bits in Port COH to control the switching of each
bank. A jumper plug that connects any B pin in JP1 to
any
corresponding I/O bit to program the bank switching of
this
available*, it is possible to switch on and off a
maximum of six memory
position of the jumper plug on the HRAM board assigned
to bank 3.
*One of bits 5, 6, or 7 is used for parity error
control, leaving a total of six bits that can be used
for bank switching. Note that bit 0 is used to control
the on/off function specified by the other seven bits.
HRAM
one
of
the
board
(see
Figure
adjacent
pins,
3-5).
banks. Figure 3-6 shows the
Jumper Area JP1
Figure 3-5
USER/TECHNICAL MANUAL
1-7,
allows
With
six
I/O
the
bits
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