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NorthStar HORIZON Random Access Memory User Manual

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North Star Computers, Inc.
14440 Catalina St., San Leandro, CA 94577 USA
(415) 357-8500
TWX/Telex (910) 366-7001
HRAM
HORIZON Random Access Memory
USER/ TECHNICAL MANUAL
trademark
HORIZON is a registered
of North Star Computers, Inc.
Copyright © 1981, by North Star Computers, Inc. All
Rights Reserved
004068

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  • Page 1 North Star Computers, Inc. 14440 Catalina St., San Leandro, CA 94577 USA (415) 357-8500 TWX/Telex (910) 366-7001 HRAM HORIZON Random Access Memory USER/ TECHNICAL MANUAL trademark HORIZON is a registered of North Star Computers, Inc. Copyright © 1981, by North Star Computers, Inc. All...
  • Page 2 This manual was digitally remastered by Howard M. Harte, June 2003. http://www.hartetec.com If you find any errors, please email hharte@hartetec.com. HRAM USER/TECHNICAL MANUAL...

  • Page 3: Table Of Contents

    CONTENTS Section Page___ 1 INTRODUCTION General Description Warranty Information Specifications 2 INSTALLING AND REMOVING THE HRAM Installation Removal 3 IMPLEMENTING HRAM OPTIONS Example Memory Configurations 3.1.1 Example 1: Three Banks 3.1.2 Example 2: Three Banks 3.1.3 Example 3: Four Banks Bank Switching 3.2.1 Designating Switched Areas 3.2.2 Designating I/O Port Control Bit...

  • Page 4: Section Page

    Section Page___ 3.5.1 Designating I/O Port Control Bits 3-20 3.5.2 Designating Parity Error Response 3-21 3.5.3 Software Instructions 3-22 Board and Schematic Revision Levels 3-22 4 TESTING THE HRAM 5 THEORY OF OPERATION Overview Address Multiplexer Refresh Logic Port CO Detector Address Latch Address Decoder Jumper Area JP1...
  • Page 5 APPENDICES A RAM Chip Location Chart B Bus Signals Used by HRAM C HRAM 64K - Parts List D HRAM 64K – Schematics E Reader Response Form HRAM USER/TECHNICAL MANUAL...
  • Page 6 HRAM USER/TECHNICAL MANUAL...

  • Page 7: Introduction

    INTRODUCTION This manual supplies the user of the HORIZON Random Access Memory (HRAM) board with information he or she needs to install the board and put it into operation. This includes information selecting various memory options, testing the board and resolving any difficulties associated with system integration.
  • Page 8 Should a unit returned for warranty repair be deemed by North Star Computers, Inc. to be defective die to purchaser's action, then repair charge (not exceed without purchaser's consent) will assessed. ANY UNITS) OR PART(S) RETURNED FOR WARRANTY REPAIR MUST BE ACCOMPANIED BY A DATED COPY OF THE ORIGINAL SALES RECEIPT.

  • Page 9: Specifications

    SPECIFICATIONS The HRAM specifications are given in Table 1-1. Table 1-1 HRAM Specifications Storage 32K bytes for the HRAM-32 Capacity 48K bytes for the HRAM-48 64K bytes for the HRAM-64 Bits per Byte Eight data bits and one parity bit. Access Time 300 ns typical HRAM...
  • Page 10 HRAM USER/TECHNICAL MANUAL...

  • Page 11: Installing And Removing The Hram

    INSTALLING AND REMOVING THE HRAM CAUTION The electronic components on the HRAM board may be damaged by the static electricity which often builds up in the human body. Before touching the HRAM board, discharge this electricity by touching a grounded metal object, such as the chassis of a Horizon which is plugged into the wall outlet.

  • Page 12: Installation

    INSTALLATION To install the HRAM in the HORIZON, hold the memory board in one hand and touch the metal chassis of the HORIZON with the other hand as shown in Figure 2-2. This will eliminate any difference in static potential between the memory board and the computer.

  • Page 13: Removal

    REMOVAL WARNING NEVER REMOVE THE HRAM BOARD UNTIL THE POWER IS COMPLETELY OFF IN THE HORIZON. To remove the HRAM, grasp the upper edge of the board. Avoid putting excessive pressure board components, and be careful of the sharp wire tips that project out of the back of the board.
  • Page 14 HRAM USER/TECHNICAL MANUAL...

  • Page 15: Implementing Hram Options

    IMPLEMENTING HRAM OPTIONS HRAM options are implemented by inserting and removing mini jumper plugs at various locations on the PC board and by changing the setting of the Memory Address switches. Figure 3-1 shows the locations of the jumper areas and the address switches on a 64K revision E board.
  • Page 16 Jumper Plug Areas and Memory Address Switches Component S1, S2 - Select the active memory areas. - Selects the bank status on reset and selects I/O control bits for bank switching and parity. - Selects areas to be bank switched. - Selects the parity error response.

  • Page 17: Example 1: Three Banks

    The jumper areas consist of clusters of pins protruding from the PC board. When a jumper plug is plugged onto a pair of adjacent pins, it connects the pins together. The jumper plugs are used to select various options on the HRAM Board as described in Sections 3.2, 3.4 and 3.5.
  • Page 18 In this case, the system contains three banks with the maximum 56K apiece and a resident operating system of 6K that is always left on. Each bank is switched off and on as a single unit. Bank 1 is configured to be turned on after the system is powered up or reset.
  • Page 19 3.1.2 EXAMPLE 2: FOUR BANKS In this example, the HORIZON contains one HRAM-48 board, three HRAM-32 boards, and a standard Micro-Disk Controller board E8OOH. HRAM boards revision B. The switches and jumper plugs for this example are shown in Figure 3-3. The 48K board is partitioned into two segments, OOOOH through 7FFFH, and 8000H through BFFFH.
  • Page 20 Example 2 Figure 3-2 HRAM USER/TECHNICAL MANUAL...

  • Page 21: Example 3: Four Banks

    3.1.3 EXAMPLE 3: FOUR BANKS In this example, the HORIZON contains one 32K HRAM board, thr.ee 48K HRAM boards and a standard Micro- Disk Controller at E8OOH. All HRAM boards are revision E. The switches and jumper plugs for this example are shown in Figure 3-4.
  • Page 22 Example 2 Figure 3-2 HRAM USER/TECHNICAL MANUAL...

  • Page 23: Bank Switching

    BANK SWITCHING Bank switching is a capability that allows multiple memory boards to take turns using the same address region. Different memory "banks" are swapped in and out of the address region under software control, thus extending the HORIZON’s memory capability beyond the limitation set by the processor's 16 address bits.
  • Page 24 Table 3-1 Bank Switching Configurations Jumper Description Area Both halves of the board always on. Bank switching is disabled on this board. Both halves of the board bank switchable. The 32K section starting at 0000H is switchable. The 32K section starting at 8000H is always on.

  • Page 25: Designating I/O Port Control Bit

    The last 8k portion of the HRAM board, EOOOH through FFFFH, may be enabled in a manner different than that described above, depending upon the setting of the Memory Address switches (see Section 3.3). 3.2.2 Designating I/O Port Control Bits The user can choose any one of the six available I/O bits in Port COH to control the switching of each bank.

  • Page 26: Software Instructions

    JP1 Set For Bank 3 Figure 3-6 must position jumper-plug designate different bit on each board to be bank switched. If you want to combine two 32K HRAM boards into a single larger bank, program both boards with the same bit. A 64K cannot be divided into two different 32K banks.

  • Page 27: Bank Status On Reset

    Take care to allow only one bank to be on at a time. Section 3.2.4 describes method insuring that only one bank comes on when power is first turned When switching banks, previous bank must be switched off before the next bank is switched on.
  • Page 28 To enable bank switching, designate one bank as the bank to be turned on whenever the system is powered up or reset. On the board(s) that constitute that. bank, move the jumper plug (s) to the position shown in Figure 3-8. This will cause all the memory in this bank to be on after the system is powered up or reset.

  • Page 29: Memory Address Switches

    MEMORY ADDRESS SWITCHES 3.3.1 Revision B Board The Memory Address switches allow the HRAM Board to respond to some sections of the memory address space others. correspondence between Memory Address switches S1 and S2 on the revision B board and the address space is shown in Figure 3-10. Memory Address Switches - Revision B Board Figure 3-10 HRAM...

  • Page 30: Revision E Board

    Each switches corresponds section of the address space. The last 8K section is further divided into 1K sections by the switches in For addresses OOOOH through DFFFH, each 8K section is controlled switches bank switching scheme described in Section 3.2. In order these sections active,...
  • Page 31 Memory A d d r e s s Switches - Revision E Board Figure 3-11 HRAM USER/TECHNICAL MANUAL...
  • Page 32 Each switches corresponds section of the address space. The last 8K section is further divided into 1K sections by the switches in For addresses 0000H through DFFFH, each 8K section is controlled switches bank switching scheme described in Section 3.2. In order these sections active,...
  • Page 33 Table 3-2 S2 Switch Pairs Switch Pair Description in S2 Corresponding 2K section is always off. Corresponding 2K section is on when bank is switched off. This Configuration is not normally used. Corresponding 2K section is on when bank is switched on. Corresponding 2K.

  • Page 34: Board

    3.3.3 32K BOARD If the switches in Memory Address switch S1 are not set properly, the HRAM-32 can respond to more than 32K of address space. For example, if switch 0 and 8 of S1 both same memory responds addresses 0000H through 1FFFH...

  • Page 35: First Quadrant Option (Revision E Board Only)

    FIRST QUADRANT OPTION The First Quadrant option is only available on the revision E HRAM board and is used only with the 48K version of the board. When the option is implemented, it causes the board to respond to the last 48K of the memory address space (4000H through FFFFH) instead of the first 48K (0000H through BFFFH).

  • Page 36: Parity Checking

    PARITY CHECKING parity checking feature makes, possible detect a memory read or write error and generate a program interrupt if an error occurs. 3.5.1 Designating I/O Port Control Bits The HRAM uses I/O port C0H to arm and disarm parity error interrupts.

  • Page 37: Designating Parity Error Response

    3.5.2 Designating Parity Error Response When the parity logic is armed and an error occurs, one of ten possible interrupts can be generated. The position of the mini-jump in JP3 allows the user to select one of eight vectored interrupts (VIO - V17), one nonvectored interrupt (PINT), or one non-maskable interrupt (NMI).

  • Page 38: Software Instructions

    JP3 Set to Disable Parity Error Interrupts Figure 3-14 3.5.3 Software Instructions The following instructions indicate how to arm and disarm parity checking. This example assumes that bit 6 has been selected. MVI A,41H ; Clear any previous parity errors and OUT 0C0H ;...
  • Page 39 TESTING THE HRAM It is always advisable to test the HRAM board before actually using it. To test the HRAM, install it in a HORIZON system and run the RAM TEST3 or RAMTEST5 diagnostic programs. These programs are on the DOS 5.2 diskette. They are described System Software...
  • Page 40 HRAM USER/TECHNICAL MANUAL...

  • Page 41: Overview

    THEORY OF OPERATION Figure 5-1 shows a block diagram of the HRAM board; The blocks in this diagram are coordinated with the schematics in Appendix D. Each block corresponds to a shaded area of the schematics. In addition, the names used in the blocks are the same as those used in the schematics.
  • Page 42 HRAM Block Diagram Figure 5-1 HRAM USER/TECHNICAL MANUAL...

  • Page 43: Address Multiplexer

    The 16-bit memory address enters the board on the A Bus and is used by the HRAM in the following ways: 1. The four most significant bits used Address Latches and decoders to determine if this board should respond to the memory address. 2.

  • Page 44: Address Latch

    The Port C0 Detector examines the low order eight bits of the memory address (A0 through A7) and brings signal PORT MATCH to a slow level when these bits contain a hexadecimal C0. PORT MAT H is used to determine when an output instruction is being issued to the HRAM board.

  • Page 45: Jumper Area Jp1

    Each switch pair can cause its associated -memory address space always always switched along with the memory bank. JUMPER AREA JP1 This jumper area is used to select the following options on the HRAM Board: 1. It determines the status of the memory bank on this HRAM Board when the WIt signal in low (see Section 3.2.4).

  • Page 46: Strobe Generator

    determines which interrupt generate response to a parity error (see Section 3:5.2): jumper plug area makes this determination by connecting the PARITY INT signal to one of10 interrupt lines: VI0 THROUGH VI7, NMI and PINT. STROBE GENERATOR Strobe Generator produces various strobes timing pulses used throughout the HRAM board.
  • Page 47 The Strobe Generator selects one of four rows of RAM chips by generating one of four row address strobes: RASH. strobe that generated depends on the memory address, the size of the memory and in some cases, on whether or not the First Quadrant option is selected (see Section 3-4).
  • Page 48 Table 5-2 Chip Selection-64K OR 48K, First Quadrant Option active Address Range Address Strobe Chip Locations 0000H - 3FFFH RAS 1 4A-4J 4000H - 7FFFH RAS 2 2A-2J 2A-2J 8000H - BFFFH RAS 4 3A-3J 3A-3J C000H - FFFFH RAS 3 1A-1J 1A-1J On a 32K HRAM, the high order address bit (A15) is...

  • Page 49: Voltage Regulators

    5.10 VOLTAGE REGULATORS There are three voltage regulators on the HRA'M board. These regulators produce +12 volts, +5 volts and -5 volts. All three of these voltages are used by the RAM chips. The +5 volts is also used by the digital logic chips.
  • Page 50 HRAM USER/TECHNICAL MANUAL...

  • Page 51: Check Hram Seating

    TROUBLESHOOTING The procedures in the following sections may be used troubleshoot HORIZON system when suspected that HRAM board functioning properly. WARNING DO NOT REMOVE THE COVER FROM THE HORIZON UNTIL THE POWER IS OFF, THE FAN HAS STOPPED, AND THE RED INDICATOR LIGHT ON THE FRONT PANEL HAS FULLY DIMMED.

  • Page 52: Change Board Slots

    CHANGE BOARD SLOTS 1. Turn off the HORIZON power. 2. Move the HRAM to another slot in the card cage and insert the board firmly in the connector. 3. Turn the power back on, and test the HRAM again. CHECK HRAM CONFIGURATION 1.

  • Page 53: Replace Hram

    REPLACE HRAM 1. Locate a good, spare HRAM board or another memory board of the same capacity. 2. Turn off the HORIZON power. 3. Remove the HRAM. 4. Check the configuration of the spare memory board to insure that it will respond to the desired range of addresses.
  • Page 54 HRAM USER/TECHNICAL MANUAL...
  • Page 55 HRAM CHIP LOCATION CHARTS APPENDIX A HRAM-64 000 0 200 0 400 0 600 0 8000 A000 C00 0 E00 0 HRAM-48 000 0 200 0 400 0 600 0 8000 A000 C00 0 E00 0 HRAM-32 000 0 200 0 400 0 600 0 8000...
  • Page 56 HRAM USER/TECHNICAL MANUAL...
  • Page 57 HRAM INTERFACE SIGNALS APPENDIX B Signal Name Description Type of Signal Address A15-AO 16 bits of address from the processor Data D17-DIO 8 bits of data to the processor D07-D00 8 bits of data from the processor Cycle Status SMEMR True on memory reads SOUT True on output...
  • Page 58 HRAM User/Technical Manual Type of Signal Signal Name Description Miscellaneous PHASE 2 Clock from processor True when processor is being reset due to power on clear logic or the rear panel reset switch. PHANTOM Not used in a standard HORIZON HRAM USER/TECHNICAL MANUAL...
  • Page 59 HRAM-64 PARTS LISTS APPENDIX C REVISION B BOARD ITEM DESCRIPTION 00127 HRAM PC BOARD 43045 IC 74S00 SCHOTTKY 5C,6C 43047 IC 74S10 SCHOTTKY 5B,7C 43048 IC 74S20 SCHOTTKY 43050 IC 74574 SCHOTTKY 43051 IC 745113 SCHOTTKY 43001 IC 74LS00 43004 IC 74LS04 43006 IC 74LS08...
  • Page 60 ITEM DESCRIPTION 61003 RESISTOR NETWK 2.2K (6 POS) 01041 CAPACITOR 22 MF 20V 01022 CAPACITOR 6.8 MF 35V C8,C9,C10 01021 CAPACITOR 2.2 MF 25V C1,C2 01002 CAPACITOR 47 PF C4-C7 01001 CAPACITOR .047 MF CER BY-PASS 65002 VOLTAGE REGULATOR 7805 65003 VOLTAGE REGULATOR 791,05 65006...
  • Page 61 REVISION E BOARD ITEM DESCRIPTION 00127 64K RAM FAB D00127 43045 IC 74500 SCHOTTKY 5C,6C 43047 IC 74510 SCHOTTKY 5B,7C 43048 IC 74520 SCHOTTKY 43050 IC 74574 SCHOTTKY 43051 IC 745113 SCHOTTKY 43001 IC 745500 43004 IC 745504 43006 IC 745508 43009 IC 745514 43001...
  • Page 62 ITEM DESCRIPTION 61001 RESISTOR NETWORK 22 OHM 16P, 61006 RESISTOR NETWORK 4.7K(10POS) 61003 RESISTOR NETWORK 2.2K(6POS) SIP 01041 CAPACITOR 22MF 20V 01022 CAPACITOR 6.8MF 35V C8,C9,C10 0,1043 CAPACITOR 2.2MF 35V Cl,C2 01002 CAPACITOR 47PF C4,C5, C6,C7 01001 CAPACITOR .047MF CER. BY-PASS 65002 VOLTAGE REGULATOR 7805...
  • Page 63 ITEM DESCRIPTION 13093-08 1 HEADER, DOUBLE ROW 3 PIN 13093-04 2 HEADER, DOUBLE ROW 4 PIN 13093-10 1 HEADER, DOUBLE ROW 10 PIN 13087 CONN. PCB-"MINI-JUMPER" JP1(3EA) JP4(2EA) JP2(2EA) JP3(3EA) 1309302 1 HEADER, DOUBLE ROW, 2 POS 130980.2 1 HEADER, SINGLE ROW, 2 POS J,P6 HRAM USER/TECHNICAL MANUAL...
  • Page 64 HRAM USER/TECHNICAL MANUAL...
  • Page 65 HRAM SCHEMATICS NOTES 1. Use revision A schematics with an assembly revision B board. This designation is marked on component side board. 2. Use revision C schematics with an assembly revision E board. This designation marked on the component side of the board.

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