Reset Operation; Overview Of The Reset Operation - Fujitsu F2MC-8L F202RA Hardware Manual

F2mc-8l 8-bit microcontroller
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CHAPTER 3 CPU
3.5.3

Reset Operation

The CPU reads the mode data (mode fetch) and reset vector from internal ROM
according to the mode pin settings following the cancellation of a reset. For a return
triggered by a reset when power is turned on and in stop mode, the CPU fetches the
mode after oscillation stabilization wait time has expired. When a reset occurs, the
contents in RAM cannot be guaranteed.

Overview of the Reset Operation

Being reset
Mode fetch
(reset operation)
Normal operation
(RUN mode)
48
Figure 3.5-3 Reset Operation Flow
Software reset
Watchdog reset
NO
State of reset wait-
ing for stabilization
of oscillation
Instruction code fetched from the address that
indicates the reset vector; the instruction is then
executed.
External reset input
Power-on
reset selected?
YES
When power
is turned on or in stop
mode?
YES
State of reset wait-
ing for stabilization
of oscillation
External reset
state cancelled?
YES
Mode data fetch
Reset vector fetch
Power-on reset
State of reset wait-
ing for stabilization
of oscillation
NO

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