Reset Flag Register (Rsfr); Configuration Of The Reset Flag Register (Rsfr) - Fujitsu F2MC-8L F202RA Hardware Manual

3.5.1

Reset Flag Register (RSFR)

The reset flag register (RSFR) allows confirmation of the source for a generated reset.
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Configuration of the Reset Flag Register (RSFR)

Address
bit7
000E
H PONR ERST
R
R : Read only
: Unused
X : Undefined
Figure 3.5-1 Configuration of Reset Flag Register (RSFR)
bit6 bit5 bit4 bit3 bit2 bit1
WDOG SFTR
R R R
WDOG
ERST
bit0 Initial value
XXXX----
Software reset flag bit
SFTR
When read
0
1 The source is software reset.
Watchdog reset flag bit
When read
0
The source is watchdog reset.
1
External reset flag bit
When read
0
The source is external reset.
1
Power-on reset flag bit
PONR
When read
0
1 The source is power-on reset.
CHAPTER 3 CPU
B
When written
Does not affect
operations
When written
Does not affect
operations
When written
Does not affect
operations
When written
Does not affect
operations
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