Configuration Of Time-Base Timer - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 5 TIME-BASE TIMER
5.2

Configuration of Time-base Timer

The time-base timer consists of the following four function blocks.
• Time-base counter
• Counter clear circuit
• Interval timer selector
• Time-base timer control register (TBTC)
■
Block Diagram of Time-base Timer
F
divided
by two
IRQ7 (time-base timer interrupt)
OF: Overflow
F
● Time-base timer counter
A 21-bit up counter that accepts the oscillation frequency divided by two as the count clock and stops
operating when oscillation stops.
● Counter clear circuit
Clears the counter when the TBTC register is set (TBR = 0), stop mode is entered (STBC: STP = 1), or a
power-on reset occurs.
● Interval timer selector
Selects 1 bit for the interval timer from four bits in the time-base counter. When the specified bit overflows,
an interrupt occurs.
● Time-base timer control register (TBTC)
Selects a time interval, clears the counter, controls interrupts, or checks the status.
118
Figure 5.2-1 Block Diagram of Time-base Timer
Time-base timer counter
CH
1 2 3 6
X2 X2 X2 X2
Clearing counter
Clearing watchdog timer
Power-on reset
Starting stop mode
(in normal mode)
Oscillation frequency
:
CH
To A/D converter
7
8 9 10 11 12
X2 X2 13
X2 X2 X2 X2 X2 X2
OF
OF
Counter
Interval timer
clear
selector
circuit
TB0F TBIE
Time-base timer control register (TBTC)
To watchdog timer
14 15 16 17 20 21
X2
X2 X2 X2 X2
To clock control
section oscillation
stabilization time
selector
OF
OF
TBC1 TBC0 TBR