Watchdog Control Register (Wdtc) - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 6 WATCHDOG TIMER
6.3

Watchdog Control Register (WDTC)

The watchdog control register (WDTC) activates and clears the watchdog timer.
■
Watchdog Control Register (WDTC)
Address
bit7
0009
RESV
H
R/W
R/W : Readable/writable
: Unused
X : Undefined
Table 6.3-1 Explanation of Functions of Each Bit in Watchdog Control Register (WDTC)
bit7
bit6
to
bit4
bit3
to
bit0
130
Figure 6.3-1 Watchdog Control Register (WDTC)
bit6 bit5 bit4 bit3
WTE3 WTE2 WTE1 WTE0
R/W
WTE3 WTE2 WTE1 WTE0
0 1
Other than above
RESV
Write "0" to this bit.
0
Bit name
RESV: Reserved bit
Unused bits
WTE3, WTE2,
WTE1, WTE0:
Watchdog control bits
bit2 bit1 bit0
Initial value
0---XXXX
R/W R/W R/W
Starts the watchdog timer
(upon first writing after reset)
0 1
Clears the watchdog timer
(upon second or subsequent writing after a
reset)
No operation
Reserved bit
• Write "0" to this bit.
• Undefined when it is read.
• Writing values does not affect operation.
• Writing "0101 " activates (for first writing) or clears (for second
B
or subsequent writing) the watchdog timer.
• Writing other than "0101
Note:
These bits indicate "1111
instructions cannot be used.
B
Watchdog control bit
Description
" does not affect operation.
B
" when read. Bit manipulation
B