Configuration Of A/D Converter - Fujitsu F2MC-8L F202RA Hardware Manual

12.2

Configuration of A/D Converter

The A/D converter consists of the following nine blocks.
• Clock selector (input clock selector for activation of A/D conversion)
• Analog channel selector
• Sample hold circuit
• D/A converter
• Comparator
• Control circuit
• A/D data register (ADDH and ADDL)
• A/D control register 1 (ADC1)
• A/D control register 2 (ADC2)
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Block Diagram of the A/D Converter
TO
(output of an 8/16-bit timer)
8
(output of a time-base
2 /F
CH
timer)
P03/INT23/AN7
P02/INT22/AN6
P01/INT21/AN5
P00/INT20/AN4
P43/AN3
P42/AN2
P41/AN1
P40/AN0
: Output of an 8/16-bit capture timer/counter
TO
: Oscillation
F
CH
Figure 12.2-1 Block Diagram of the A/D Converter
RESV4 RESV3 ADCK ADIE RESV2 EXT RESV1
Clock
selector
Analog
Sample
channel
hold
selector
circuit
D/A
converter
ANS2
A/D control register 1 (ADC1)
A/D control register 2 (ADC2)
Comparator
A/D data register
(ADDH,ADDL)
ADI
ANS1 ANS0 ADMV RESV0
IRQ8
CHAPTER 12 A/D CONVERTER
Control circuit
AD
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