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3.1 Overview
This section describes the address allocation conventions for the MMC2001 system.
The general address map shown in Table 3-1 is recommended for all members of the
MMC2001 architecture. Accesses to unimplemented regions of the map may result in
TEA termination to the processor.
Address Range
00000000 – 00000003
00000004 – 0FFFFFFF
10000000 – 1FFFFFFF
20000000 – 2FFFFFFF
30000000 – 3FFFFFFF
40000000 – FFFFFFFF
For the initial implementations of MMC2001, the address range of 0x4000 0000
0xFFFF FFFF is reserved for future use. Accesses to this range result in a transfer
error termination to the CPU.
Note that in the current MMC2001 implementation, accesses to on-chip devices other
than RAM and ROM are considered privileged; no user mode access is allowed to
on-chip peripherals.
3.2 Peripheral Module Address Allocation
The register blocks for all on-chip peripheral devices are located on 4096-byte bound-
aries. Peripherals that require additional address space (e.g., for buffers) are
assigned additional 4-Kbyte blocks. In this case, peripherals are located on a 2
address boundary corresponding to the size of the block. Within a 4-Kbyte block,
peripheral registers may be incompletely decoded, such that the register map repeats
throughout the entire block; or the peripheral may return undefined values for unim-
plemented register addresses. The description of the peripherals in this document
provide information regarding the result of accesses to unimplemented registers.
MMC2001
REFERENCE MANUAL
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
SECTION 3
SYSTEM MEMORY MAP
Table 3-1 MMC2001 Module Address Map
Use
Off-chip boot ROM vector fetch
(MOD asserted)
On-chip ROM
On-chip peripherals
Off-chip devices
On-chip RAM
Reserved
SYSTEM MEMORY MAP
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User Access
Access
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MOTOROLA
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3-1
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