Uart Control Register 2 (Ucr2); Uart Control Register 2 - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

IREN — Infrared Interface Enable
Setting this bit enables the infrared interface. Refer to 11.3.3 Infrared Interface.
0 = Infrared interface disabled
1 = Infrared interface enabled
At reset, this bit is cleared to zero.
RTSD EN — RTS Delta Interrupt Enable
This bit enables or disables RTS delta interrupts. The current status of the RTS pin is
read in the UART status register.
0 = RTS interrupt disabled
1 = RTS interrupt enabled
At reset, this bit is cleared to zero.
SNDBRK — Send Break
This bit forces the transmitter to send a break character. The transmitter will finish
sending the character in progress (if any) and then send break characters until this bit
is reset. The user is responsible for ensuring that this bit is high for a sufficient period
of time to generate a valid break; the transmitter samples SNDBRK after every bit is
transmitted.
Following completion of the break transmission, the UART transmits two mark bits.
The user can continue to fill the FIFO, and any characters remaining will be transmit-
ted when the break is terminated. This bit cannot be changed until the UART EN and
TX EN bits in the UART control register 1 (CR1) are set.
0 = Do not send break
1 = Send break (continuous zeros)
At reset, this bit is cleared to zero.
DOZE — Doze Mode
When the CPU executes a doze instruction and the system is placed in the doze
mode, the DOZE bit affects operation of the UART. If this bit is set when the system is
in the doze mode, the UART is disabled. Refer to 11.7 UART Operation in Low-
Power System Modes.
0 = UART unaffected in doze mode
1 = UART disabled in doze mode
At reset, this bit is cleared to zero.
UART EN — UART Enable
This bit enables or disables the UART. If this bit is cleared in the middle of a transmis-
sion, the transmitter stops and drives the TXD line to logic one.
0 = UART disabled
1 = UART enabled
At reset, this bit is cleared to zero.

11.4.4 UART Control Register 2 (UCR2)

UART control register 2 is a read/write register. This register controls the overall oper-
ation of the UART. It controls the clock source, number of bits per character, parity
generation and checking, and behavior of the RTS, CTS, and DTR pins.
MMC2001 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER MODULE
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