Once Control Register; Once Register Addressing - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

RS
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001 – 10110
10111
11000 – 11110
11111
16.6.2 OnCE Control Register (OCR)
The OnCE control register (OCR) is a 32-bit register used to select the events that will
put the device in debug mode and to enable or disable sections of the OnCE logic.
The control bits are read/write.
OCR — OnCE Control Register
31 30 29 28
R 0 0 0 0
W
RESET:
0 0 0 0
15 14 13 12
R
DR IDRE TME FRZC
W
RESET:
0 0 0 0
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Table 16-1 OnCE Register Addressing
Register Selected
Trace Counter (OTC)
Memory Breakpoint Counter A (MBCA)
Memory Breakpoint Counter B (MBCB)
Program Counter FIFO and Increment Counter
Breakpoint Address Base Register A (BABA)
Breakpoint Address Base Register B (BABB)
Breakpoint Address Mask Register A (BAMA)
Breakpoint Address Mask Register B (BAMB)
CPU Scan Register (CPUSCR)
No Register Selected (Bypass)
OnCE Control Register (OCR)
OnCE Status Register (OSR)
Reserved (Factory Test Control Register — do not access)
Reserved (MEM_BIST, do not access)
Reserved (Bypass, do not access)
Reserved (LSRL, do not access)
Reserved (Bypass, do not access)
27 26 25 24
0 0 0 0
0 0 0 0
11 10 9 8
RCB BCB
0 0 0 0
Figure 16-5 OnCE Control Register
OnCE™ DEBUG MODULE
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Reserved
Reserved
Reserved
Bypass
23 22 21 20
0 0 0 0
0 0 0 0
7 6 5 4
RCA
0 0 0 0
19 18 17 16
0 0
SQC
0 0 0 0
3 2 1 0
BCA
0 0 0 0
MMC2001
REFERENCE MANUAL