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Samsung Semiconductor, Inc.
ARTIK 530
S
Figure 18 shows the highlights of the I/O Expander board. The I/O Expander board interfaces to the Platform board
using the 80-pin GPIO test header located at connector J701 as described abopve. The I/O Expander board contains
two additional 40-pin headers shown below that can be used to connect to external devices.
Table 6 and Table 7 show the pinouts of the J2 and J3 connectors respectively. Note that for the J3 connector, no
pins of this connector originate from the ARTIK module. Hence there is no connector pin to module pin mapping
shown.
Table 6. I/O Expander Board J2 Connector Pinout
ARTIK Module
Pin Name
AP_ADC1
AP_ADC2
AP_ADC3
AP_ADC4
AP_ADC5
N/A
AP_GPD4_SCL1
AP_GPD5_SDA1
N/A
AP_GPC10_SPI2_CS
AP_GPC9_SPI2_CLK
AP_GPC11_SPI2_MISO
AP_GPC10_SPI2_MOSI
N/A
N/A
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D
K
EVELOPMENT
IT
Figure 18. ARTIK 530s Development Kit I/O Expander Board
Module
Pin
Pin Name
Number
PY2
XADC1
PAA1
XADC2
PAA2
XADC3
PW1
XADC4
PW2
XADC5
N/A
GND
PAK9
ADD_XI2C0_SCL
PAL9
ADD_XI2C0_SDA
N/A
GND
PAL6
ADD_XSPI0_CS
PAK4
ADD_XSPI0_CLK
PAK3
ADD_XSPI0_MISO
PAL5
ADD_XSPI0_MOSI
N/A
GND
N/A
NC
I/O E
B
XPANDER
OARD
Pin
Pin
Pin Name
Number
Number
1
2
3
4
ADD_XGPIO0
5
6
ADD_XGPIO1
7
8
ADD_XGPIO2
9
10
ADD_XGPIO3
11
12
ADD_XGPIO4
13
14
ADD_XGPIO5
15
16
ADD_XGPIO6
17
18
ADD_XGPIO7
19
20
ADD_XGPIO8
21
22
ADD_XGPIO9
23
24
25
26
ADD_XAGPIO0
27
28
29
30
ADD_XPWM0_OUT
ARTIK 530s Development Kit
Module
ARTIK Module
Pin
Number
GND
N/A
PAL21
PAK21
PAK20
PAK37
PA39
PAL26
AP_GPB9_I2SDIN1
PAG2
PAH2
PAH1
PAJ2
GND
N/A
PAF2
GND
N/A
PAK7
AP_GPC14_PWM2
Pin Name
N/A
AP_GPE0
AP_GPE1
AP_GPE2
AP_GPB14
AP_GPA14
AP_GPA25
AP_GPA0
AP_GPA26
AP_GPA27
N/A
AP_AGP1
N/A
20
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