Status Monitoring Function; Related Registers For Status Monitoring; Table 38 Rtc Status Monitor Register; Table 39 Por Bit (Power On Reset) - Epson RX4111CE Applications Manual

Real time clock module
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14.5. Status Monitoring Function

It is a flag bit that detects the state of this product and holds the result. 3 kinds of status changes.
-
Power ON Reset
-
VLF bit is set
-
XST bit is set.

Related Registers For Status Monitoring.

14.5.1.

Table 38 RTC Status Monitor Register

Address[h]
Bank1 - E
1) POR bit
Detects Power-on Reset (POR) occurred.

Table 39 POR bit (Power ON Reset)

POR
Write
Read
2) VLF bit
VLF are set from POR or XST.

Table 40 VLF bit (Voltage Low Flag)

VLF
Write
Read
3) XST bit
When an oscillation of crystal is stopped, it is set.

Table 41 XST bit (Crystal Oscillation Stop)

XST
Write
Read
This bit is not initialized in power-on reset.
RX4111CE
ETM62E-02
Function
bit 7
POR
Flag Register
Data
0
Clear for next detection.
Ignored.
1
0
POR was not detected.
POR was detected.
1
(The result is retained until this bit is cleared to zero.)
The default value of the register is set by power-on reset.
Data
0
Clear for the next detection.
Ignored
1
0
VLF was not detected.
POR or XST was detected.
1
(The result is retained until this bit is cleared to zero.)
It is used for judgment of initialization of an RTC.
Data
0
Clear for the next detection.
Ignored.
1
0
XST was not detected.
Crystal oscillation stop was detected.
1
(The result is retained until this bit is cleared to zero.)
Seiko Epson Corporation
bit 6
bit 5
bit 4
bit 3
z
UF
TF
Description
Description
Description
14. How to use
bit 2
bit 1
bit 0
VLF
AF
EVF
XST
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