14. How to use
Figure 19 Basic Function 32.768 kHz oscillation, counter, FOUT
14.1. Clock Calendar Explanation
At the time of a communication start, the Clock & Calendar data are fixed (hold the carry operation), and it is automatically
revised at the time of the communication end. Therefore, it recommends that the access to a clock calendar has continuous
access by the auto increment function. When reading the current time, do not use the STOP bit (STOP = 0).
Setting example: Sun, 29-Feb-88 17:39:45 (leap year)
Table 16 Time Calendar setting Ex.
Bank1
Address
0h
1h
2h
3h
4h
5h
6h
Note
With caution that writing non-existent time data may interfere with normal operation of the clock counter
Time starts at the moment of STOP bit operation (1 to 0 timing)
14.1.1. Clock Counter
1)
[SEC],
[MIN]
register
These registers are 60-base BCD counters. When update signals were generated from a lower counter, a upper counter is one
incremented. At the timing when the lower register changes from 59 to 00, carry is generated to the higher register and thus
incremented.
When writing is performed to [SEC] register, Internal-count-down-chain less than one second (512 Hz1Hz) is cleared to 0.
2)
[HOUR]
register
This register is a 24-base BCD counter (24-hour format). These registers are incremented at the timing when carry is generated
from a lower register.
3)
Leap second adjustment
For leap second adjustment, user can write "60" into SEC counter, after 1 second SEC counter is to be set "00".
Normally second counter counts up "59" to "00".
RX4111CE
ETM62E-02
Function
bit 7
bit 6
0
1
SEC
MIN
0
0
HOUR
0
0
0
0
WEEK
0
0
DAY
MONTH
0
0
YEAR
1
0
Seiko Epson Corporation
bit 5
bit 4
bit 3
bit 2
0
0
0
1
1
1
0
1
0
0
0
0
1
0
1
0
0
0
0
0
1
14. How to use
bit 1
bit 0
1
0
1
0
0
1
1
1
1
0
0
1
0
0
1
0
1
0
0
0
0
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