Features - Xilinx Arty A7 Reference Manual

22.8.2018

Features

Xilinx Artix-7 FPGA
5,200 slices containing four 6-input LUTs and 8 flip-flops (15,850 slices)
1,800 Kbits of fast block RAM () (4,860 Kbits)
5 clock management tiles (CMTs), each with a phase-locked loop and mixed-mode clock manager (6 CMTs)
90 DSP slices (240 DSP slices)
Internal clock speeds exceeding 450MHz
On-chip analog-to-digital converter (XADC)
Programmable over JTAG and Quad-SPI Flash
System Features
256MB DDR3L with a 16-bit bus @ 667MHz
16MB Quad-SPI Flash
USB-JTAG Programming circuitry
Powered from USB or any 7V-15V source
System Connectivity
10/100 Mbps Ethernet
USB-UART Bridge
Interaction and Sensory Devices
4 Switches
4 Buttons
1 Reset Button
4 LEDs
4 RGB LEDs
Expansion Connectors
4 Pmod connectors
Arduino/ChipKit Shield connector
1), 2), 3), 4)
Arty A7-100 variant value in parentheses where different
https://reference.digilentinc.com/reference/programmable-logic/arty-a7/reference-manual
Arty A7 Reference Manual [Reference.Digilentinc]
2)
4)
1)
3)
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