Power Supplies - Xilinx Arty A7 Reference Manual

22.8.2018
What makes the Arty A7 so flexible is its FPGA. Among their many features, FPGAs have the ability to transform into a custom
software-defined System-on-a-Chip (SoC). These "Soft SoC" FPGA configurations are designed graphically using a tool called Vivado IP
Integrator (Vivado IPI). In this tool, pre-built peripheral blocks are dragged from an extensive library and dropped into your processing
system as you see fit. These pre-built peripherals include timers, UART/SPI/IIC controllers, and many of the other devices you would
typically find in an SoC or microcontroller. Ambitious users will also find that they can create their own peripheral blocks by writing
them in a Hardware Definition Language (HDL), specifically Verilog or VHDL. For those with no interest in learning HDL, the Xilinx
High Level Synthesis tool can be used to define custom peripheral blocks by writing them in C.
The Arty A7's Soft SoC configurations are powered by MicroBlaze processor cores. MicroBlaze is a 32-bit RISC soft processor core,
designed specifically to be used in Xilinx FPGAs. The MicroBlaze processor in an SoC configuration is typically run at 100 MHz (),
though it is possible to design your SoC so that it can operate at over 200MHz. The Arty A7 supports large MicroBlaze programs with
demanding memory requirements by providing 16MB of non-volatile program memory and 256MB of DDR3L RAM ().
(https://reference.digilentinc.com/_detail/arty/arty_xsdk.png?id=reference%3Aprogrammable-logic%3Aarty-a7%3Areference-manual)
Figure 2.2 Xilinx SDK
After you design your soft SoC configuration for the Arty A7 you can start writing programs for it. This is done by exporting your SoC
design out of Vivado IPI and into the Xilinx Software Development Kit (XSDK), an Integrated Development Environment (IDE) for
designing/debugging MicroBlaze programs in C. After the IPI to XSDK handoff, XSDK is automatically configured to include libraries
and examples for the peripheral blocks you've included in your SoC. At this point, programming the Arty is very similar to programming
other SoC or microcontroller platforms: Programs are written in C, programmed into board over USB, and then optionally debugged in
hardware. Soft SoC configurations and MicroBlaze programs can also be loaded into the 16MB non-volatile program memory so that
they execute immediately after the Arty is powered on.
Although the Arty A7 is particularly well suited for Microblaze Soft SoC designs, it can also be programmed with a Register-Transfer
Level (RTL) circuit description like any other FPGA development platform. This design flow requires that you describe your RTL circuit
using an HDL within Vivado, and it does not use the Vivado IPI or XSDK tools. Designing this way has many advantages, but is very
unlike programming a single board computer, and instead is used by those familiar with FPGA design or interested in designing and
implementing a digital circuit that doesn't contain a processor.

3 Power Supplies

The Arty A7 requires a 5 volt power source to operate. This power source can come from the Digilent USB-JTAG port (J10) or it can be
derived from a 7 to 15 Volt DC power supply that's connected to the Power Jack (J13) or Pin 8 of Header J7.
A power-good LED () (LD11), driven by the 3.3V output (VCC3V3) of the DA9062 regulator, indicates that the board is receiving
power and that the onboard supplies are functioning as expected. If this LED () does not illuminate when an acceptable power supply is
connected, please contact your distributorof
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