When Subsystem Clock Is Not Used; Ring-Osc Oscillator; Prescaler - NEC 78K0 User Manual

5.4.3 When subsystem clock is not used

If it is not necessary to use the subsystem clock for low power consumption operations and watch operations,
connect the XT1 and XT2 pins as follows.
XT1: Connect directly to EV
XT2: Leave open
In this state, however, some current may leak via the on-chip feedback resistor of the subsystem clock oscillator
when the X1 input clock and Ring-OSC clock stop. To minimize leakage current, the above on-chip feedback resistor
can be set not to be used via bit 6 (FRC) of the processor clock control register (PCC). In this case also, connect the
XT1 and XT2 pins as described above.
Remark The feedback resistor is required to control the bias point of the oscillation waveform so that the bias
point is in the middle of the power supply voltage.

5.4.4 Ring-OSC oscillator

Ring-OSC oscillator is incorporated in the 78K0/KC1.
"Can be stopped by software" or "Cannot be stopped" can be selected by a mask option. The Ring-OSC clock
always oscillates after RESET release (240 kHz (TYP.)).

5.4.5 Prescaler

The prescaler generates various clocks by dividing the X1 oscillator output when the X1 input clock is selected as
the clock to be supplied to the CPU.
Caution When the Ring-OSC clock is selected as the clock supplied to the CPU, the prescaler generates
various clocks by dividing the Ring-OSC oscillator output (f
CHAPTER 5 CLOCK GENERATOR
or V
DD DD
Figure 5-11. Subsystem Clock Feedback Resistor
FRC
P-ch
Feedback resistor
XT1
User's Manual U16227EJ2V0UD
XT2
= 240 kHz (TYP.)).
X
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