Mitsubishi Electric melsec q00ujcpu User Manual page 534

Programmable controller
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Special
ACPU
Special
Register
Special
Register for
after
Register
Modification
Conversion
D9053
SD1053
D9054
SD1054
D9055
SD1055
SD812
D9072
SD1072
D9085
SD1085
D9090
SD1090
D9091
SD1091
D9094
SD1094
SD251
D9095
SD1095
SD200
*1: The relevant modules are as follows:
• The Universal model QCPU whose serial number (first five digits) is "10102" or later.
• Q00UJCPU, Q00UCPU, Q01UCPU
Table12.28 Special register
Name
Meaning
Transition condition
Error transition
number where error
occurred
Sequence step
Error sequence
number where error
step
occurred
Status latch
execution step
Status latch step
number
PLC
Data check of serial
communication
communication
check
module
Register for
setting time
1 s to 65535 s
check value
Number of
Number of special
special
functions modules
functions
over
modules over
Detailed error
Self-diagnosis
code
detailed error code
Head I/O
Head I/O number of I/
number of I/O
O module to be
module to be
replaced
replaced
DIP switch
DIP switch
information
information
CHAPTER12 PECIAL RELAY LIST AND SPECIAL REGISTER LIST
Details
• Stores the transition condition number, where error code 84 occurred
in an SFC program, in BIN value.
Stores "0" when error code 80, 81, 82 or 83 occurred.
• Stores the sequence step number of transfer condition and
operation output in which error 84 occurred in the SFC program in
BIN code.
• Stores the step number when status latch is executed.
• Stores the step number in a binary value if status latch is executed
in a main sequence program.
• Stores the block number and the step number if status latch is
executed in a SFC program.
Block No.
Step No.
(BIN)
Lower 8 bits
Upper 8 bits
• In the self-loopback test of the serial communication module, the
serial communication module writes/reads data automatically to
make communication checks.
• Sets the time check time of the data link instructions (ZNRD,
ZNWR) for the MELSECNET/10.
• Setting range : 1 s to 65535 s (1 to 65535)
• Setting unit
: 1 s
• Default value : 10 s (If 0 has been set, default 10 s is applied)
• For details, refer to the manual of each microcomputer program
package.
• Stores the detail code of cause of an instruction error.
• Stores the first two digits of the head I/O number of the I/O module,
which will be dismounted/mounted online (with power on), in BIN
value.
Example) Input module X2F0
H2F
• The DIP switch information of the CPU module is stored in the
following format.
0: OFF
1: ON
b15
to
b5
b4
b3
b2
D9095
0
Corresponding
CPU
Qn(H)
QnPH
(BIN)
Qn(H)
QnPH
Qn(H)
QnPH
Qn(H)
QnPH
*1
QnU
Qn(H)
QnPH
b1
b0
Qn(H)
QnPH
SW1
SW2
SW3
SW4
SW5
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