Toshiba TLCS-900/H1 Series Manual page 30

Example 2: PLL stopping
PLLCR0 EQU 10E8H
PLLCR1 EQU 10E9H
LD (PLLCR0), X0XXXXXXB
LD (PLLCR1), 0XXXXXXXB
X: Don't care
<FCSEL>
<PLLON>
PLL output: f
PLL
System clock f
SYS
Changes from 40 MHz to 10 MHz
; Changes fc from 40 MHz to10 MHz.
; Stop PLL.
Stops PLL operation
92CH21-28
TMP92CH21
2009-06-19