Motorola CPU32 Reference Manual page 21

M68300 series central processor unit
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III
Mnemonic
ABCD
ADD
ADDA
ADDI
ADDQ
ADDX
AND
ANDI
ASL, ASR
Bcc
BCHG
BCLR
BGND
BKPT
BRA
BSET
BSR
BTST
CHK, CHK2
CLR
CMP
CMPA
CMPI
CMPM
CMP2
DBcc
DIVS, DIVSL
DIVU, DIVUL
EOR
EORI
EXG
EXT,EXTB
LEA
LINK
LPSTOP
LSL, LSR
ILLEGAL
JMP
JSR
MOTOROLA
1-6
Table 1-1. Instruction Set Summary
Description
Mnemonic
Description
Add Decimal with Extend
MOVE
Move
Add
MOVECCR
Move Condition Code Register
Add Address
MOVESR
Move Status Register
Add Immediate
MOVEUSP
Move User Stack Pointer
Add Quick
MOVEA
Move Address
Add with Extend
MOVEC
Move Control Register
Logical AND
MOVEM
Move Multiple Registers
Logical AND Immediate
MOVEP
Move Peripheral
Arithmetic Shift Left and Right
MOVEQ
Move Quick
Branch Conditionally
Test Bit and Change
Test Bit and Clear
MOVES
Move Alternate Address Space
MULS, MULS.L
Signed Multiply
MULU, MULU.L
Unsigned Multiply
Background
NBCD
Negate Decimal with Extend
Breakpoint
NEG
Negate
Branch
NEGX
Negate with Extend
Test Bit and Set
NOP
No Operation
Branch to Subroutine
Test Bit
OR
Logical Inclusive OR
ORI
Logical Inclusive OR
Check Register Against
Immediate
Upper and Lower Bounds
PEA
Push Effective Address
Clear
RESET
Reset External Devices
Compare
Compare Address
Compare Immediate
Compare Memory to Memory
ROL, ROR
Rotate Left and Right
ROXL, ROXR
Rotate with Extend
Left and Right
RID
Return and Deallocate
Compare Register Against
Upper and Lower Bounds
RTE
Return from Exception
RTR
Return and Restore Codes
Test Condition, Decrement and
RTS
Return from Subroutine
Branch
SBCD
Subtract Decimal with Extend
Signed Divide
Unsigned Divide
Logical Exclusive OR
Scc
Set Conditionally
STOP
Stop
SUB
Subtract
Logical Exclusive OR
SUBA
Subtract Address
Immediate
SUBI
Subtract Immediate
Exchange Registers
SUBQ
Subtract Quick
Sign Extend
SUBX
Subtract with Extend
Load Effective Address
SWAP
Swap Register Words
Link and Allocate
Low-Power Stop
Logical Shift Left and Right
TBLS,TBLSN
Table Lookup and Interpolate
(Signed)
TBLU, TBLUN
Table Lookup and Interpolate
Take IlIeqallnstruction Trap
(Unsigned)
Jump
TAS
Test Operand and Set
Jump to Subroutine
TRAP
Trap
TRAPoc
Trap Conditionally
TRAPV
Trap on Overflow
TST
Test Operand
UNLK
Unlink
OVERVIEW
CPU32 REFERENCE MANUAL

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