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Motorola Manuals
Computer Hardware
CPU32
Reference manual
Motorola CPU32 Reference Manual
M68300 series central processor unit
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Reference manual
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Contents
Table of Contents
Bookmarks
Table of Contents
Table of Contents
Overview
Features
Virtual Memory
Loop Mode Instruction Execution
Vector Base Register
Enhanced Addressing Modes
Instruction Set
Low-Power Stop Instruction
Processing States
Privilege States
Block Diagram
Programming Model
Architecture Summary
Registers
Data Types
Organization in Registers
Data Registers
Address Registers
Control Registers
Organization in Memory
Data Organization and Addressing Capabilities
Program and Data References
Notation Conventions
Implicit Reference
Memory Addressing Modes
Effective Address
Register Direct Mode
Data Register Direct
Address Register Direct
Address Register Indirect
Address Register Indirect with Postincrement
Address Register Indirect with Predecrement
Address Register Indirect with Displacement
Address Register Indirect with Index (8-Bit Displacement)
Address Register Indirect with Index (Base Displacement)
Special Addressing Modes
Program Counter Indirect with Displacement
Program Counter Indirect with Index (8-Bit Displacement)
Program Counter Indirect with Index (Base Displacement)
Absolute Short Address
Absolute Long Address
Immediate Data
Effective Address Encoding Summary
Programming View of Addressing Modes
Addressing Capabilities
General Addressing Mode Summary
M68000 Family Addressing Capability
Other Data Structures
System Stack
User Stacks
Queues
M68000 Family Compatibility
Instruction Set
New Instructions
Low-Power STOP (LPSTOP)
Unimplemented Instructions
Instruction Format
Notation
Instruction Summary
Condition Code Register
Data Movement Instructions
Integer Arithmetic Operations
Shift and Rotate Instructions
Bit Manipulation Instructions
Binary-Coded Decimal (BCD) Instructions
Program Control Instructions
System Control Instructions
Condition Tests
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M68300 Family
CP 32RM/AD
REV I
CENTRAL PROCESSOR
UNIT
REFERENCE
MANUAL
"
®
MOTOROLA
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