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Caution must be exercised when accessing the COM. If it were to be accessed
simultaneously by the compare logic and by a write, the old compare value may get
compared to the counter value.
8.5 TIMER MODULE INITIALIZATION SEQUENCE
The following paragraphs discuss a suggested method for initializing the timer module.
Since both timers are functionally equivalent, only one timer module will be referenced.
8.5.1 Timer Module Configuration
If the timer capability of the MC68340 is being used, the following steps should be
followed to initialize a timer module properly. Note that this sequence must be done for
each timer module used.
Control Register (CR)
• Clear the SWR bit to disable the timer.
Status Register (SR)
• Clear the TO, TG, and TG bits to reset the interrupts.
Module Configuration Register (MCR)
• Initialize the STP for normal operation.
• Select whether to respond to or ignore FREEZE (FRZx bits).
• Select the access privilege for the supervisor/user registers (SUPV bit).
• Select the interrupt arbitration level for the timer module (IARBx bits).
Interrupt Register (IR)
• Program the interrupt priority level for the timer interrupts (ILx bits).
• Program the interrupt vector number for the timer interrupts (IVx bits).
Preload Registers (PREL1 and PREL2)
• If required, initialize the preload registers for mode of operation.
Compare Register (COM)
• If desired, initialize the compare register.
The following steps begin operation:
Control Register (CR)
• Set the SWR bit to enable the timer.
• Enable the desired interrupts (IEx bits).
• Enable TGATE if required for mode of operation (TGE bit).
• Select the prescaler clock (PCLK bit).
MOTOROLA
Freescale Semiconductor, Inc.
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
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