Communications Processor Module (Cpm) - Motorola PowerQUICC II MPC8280 Series Reference Manual

Table of Contents

Advertisement

Table III-i. Acronyms and Abbreviated Terms
Term
BD
Buffer descriptor
BIST
Built-in self test
BRI
Basic rate interface
CAM
Content-addressable memory
CPM
Communications processor module
CRC
Cyclic redundancy check
DMA
Direct memory access
DPLL
Digital phase-locked loop
DRAM
Dynamic random access memory
DSISR
Register used for determining the source of a DSI exception
EA
Effective address
EEST
Enhanced Ethernet serial transceiver
GCI
General circuit interface
GPCM
General-purpose chip-select machine
HDLC
High-level data link control
2
I
C
Inter-integrated circuit
IDL
Inter-chip digital link
IEEE
Institute of Electrical and Electronics Engineers
IrDA
Infrared Data Association
ISDN
Integrated services digital network
JTAG
Joint Test Action Group
LIFO
Last-in-first-out
LRU
Least recently used
LSB
Least-significant byte
lsb
Least-significant bit
LSU
Load/store unit
MAC
Multiply accumulate
MMU
Memory management unit
MSB
Most-significant byte
msb
Most-significant bit
MSR
Machine state register
MOTOROLA
Freescale Semiconductor, Inc.
Part III. The Hardware Interface
For More Information On This Product,
Go to: www.freescale.com
Meaning
III-3

Advertisement

Table of Contents
loading

This manual is also suitable for:

Powerquicc ii mpc8270Powerquicc ii mpc8275Powerquicc ii mpc8280

Table of Contents