Idma Operational Description; Channel Initialization; Data Transfer - Motorola MC68302 User Manual

Integrated multi-protocol processor
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3.1.3.2 DONE. This bidirectional signal is used to indicate the last IDMA transfer.
With internal request modes, the IDMA activates DONE as an output during
the last IDMA bus cycle. With external request modes, DONE is used as an
input to the IDMA controller indicating that the device being serviced requires
no more transfers and that the transmission is to be terminated.
NOTE
If DONE is externally asserted during internal request modes, the
IDMA transfer is terminated.
3.1.4 IDMA Operational Description
Every IDMA operation involves the following steps: IDMA channel initiali-
zation, data transfer, and block termination. In the initialization phase, the
M68000 core (or external processor) loads the registers with control infor-
mation, address pointers and transfer count, and then starts the channel. In
the transfer phase, the IDMA accepts requests for operand transfers and
provides addressing and bus control for the transfers. The termination phase
occurs when the operation is complete and the IDMA interrupts the M68000
core, if interrupts are enabled.
3.1.4.1 CHANNEL INITIALIZATION. To start a block transfer operation, the M68000
core must initialize IDMA registers with information describing the data block,
device type, request generation method, and other special control options.
See 3.1.2 IDMA Registers and 3.1.5 IDMA Programming for further details.
3.1.4.2 DATA TRANSFER. The IDMA supports dual address transfers only. Thus,
each operand transfer consists of a source operand read and a destination
operand write. The source operand is read from the address contained in
the SAPR into the DHR. When the source and destination operand sizes differ,
the operand read may take up to two bus cycles to complete. The operand
is then written to the address contained in the DAPR. Again, this transfer
may be up to two bus cycles long. In this manner, various combinations of
peripheral, memory, and operand sizes may be used.
3-10
NOTE
When the SAPR and DAPR are programmed not to increment and
the bus width is 16 bits, the SAPR and DAPR addresses must be
even.
MC68302 USER'S MANUAL
MOTOROLA

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