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Philips Semiconductors
ARM-based Microcontroller
REGISTER DESCRIPTION
Table 87: UART1 Register Map
Name
Description
Receiver
U1RBR
Buffer
Register
Transmit
U1THR
Holding
Register
Interrupt
U1IER
Enable
Register
Interrupt ID
U1IIR
Register
FIFO
U1FCR
Control
Register
Line Control
U1LCR
Register
Modem
U1MCR
Control
Register
Line Status
U1LSR
Register
Modem
U1MSR
Status
Register
Scratch Pad
U1SCR
Register
Divisor Latch
U1DLL
LSB
Divisor Latch
U1DLM
MSB
*Reset Value refers to the data stored in used bits only. It does not include reserved bits content.
UART1 contains twelve 8-bit registers as shown in Table 87. The Divisor Latch Access Bit (DLAB) is contained in U1LCR7 and
enables access to the Divisor Latches.
UART1
BIT 7
BIT 6
BIT 5
MSB
MSB
0
0
0
FIFOs Enabled
0
Rx Trigger
Reserved
0
0
0
Rx
FIFO
TEMT
THRE
Error
DCD
RI
DSR
MSB
MSB
MSB
BIT 4
BIT 3
BIT 2
BIT 1
READ DATA
WRITE DATA
0
0
IIR3
IIR2
-
Loop
0
0
Back
BI
FE
PE
Trailing
Delta
CTS
Edge
DCD
RI
153
LPC2119/2129/2194/2292/2294
Reset
BIT 0 Access
Value*
LSB
RO
defined
LSB
WO
R/W
IIR1
IIR0
RO
WO
Word Length
R/W
Select
RTS
DTR
R/W
OE
DR
RO
Delta
Delta
RO
DSR
CTS
LSB
R/W
LSB
R/W
LSB
R/W
Preliminary User Manual
Address
un-
0xE0010000
DLAB = 0
0xE0010000
NA
DLAB = 0
0xE0010004
0
DLAB = 0
0x01
0xE0010008
0
0xE0010008
0
0xE001000C
0
0xE0010010
0x60
0xE0010014
0
0xE0010018
0
0xE001001C
0xE0010000
0
DLAB = 1
0xE0010004
0
DLAB = 1
May 03, 2004
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