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20.1 Standby Function and Configuration
20.1.1 Standby function
The standby function is designed to decrease power consumption of the system. The following two modes are
available.
(1) HALT mode
HALT instruction execution sets the HALT mode. The HALT mode is intended to stop the CPU operation clock.
The system clock oscillator continues oscillating. In this mode, current consumption is not decreased as much
as in the STOP mode. However, the HALT mode is effective to restart operation immediately upon interrupt
request and to carry out intermittent operations such as watch operation.
(2) STOP mode
STOP instruction execution sets the STOP mode. In the STOP mode, the main system clock oscillator stops,
stopping the whole system, thereby considerably reducing the CPU current consumption.
Data memory low-voltage hold (down to V
memory contents with ultra-low current consumption.
Because this mode can be cleared upon interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure an oscillation stabilization time after the STOP mode is
cleared, select the HALT mode if it is necessary to start processing immediately upon interrupt request.
In either of these two modes, all the contents of registers, flags, and data memory just before the standby mode
is set are held. The input/output port output latch and output buffer status are also held.
Cautions 1. When operation is transferred to the STOP mode, be sure to stop the peripheral hardware
operation and execute the STOP instruction.
2. The following sequence is recommended for power consumption reduction of the A/D
converter: First clear bit 7 (ADCS1) of the A/D converter mode register (ADM1) to 0 to stop
the A/D conversion operation, and then execute the HALT or STOP instruction.
CHAPTER 20 STANDBY FUNCTION
= 2.0 V) is possible. Thus, the STOP mode is effective to hold data
DD
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