Status Register; Table 12-12. Status Register; Table 12-13. Status Register Definitions - Sharp Blue Treak LH75400 User Manual

Direct Memory Access Controller

12.3.2.10 Status Register

The Status Register is a Read Only register that provides status information regarding the
DMA Controller. The default value after Reset is 0x00.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:12
11
10
9
8
7
6
5
4
3
2
1
0
12-14

Table 12-12. Status Register

31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R

Table 12-13. Status Register Definitions

NAME
/// Reserved Do not write.
Data Stream3 Active/Inactive
Active3 0 = Data stream3 is not active.
1 = Data stream3 is active.
Data Stream2 Active/Inactive
Active2 0 = Data stream2 is not active.
1 = Data stream2 is active.
Data Stream1 Active/Inactive
Active1 0 = Data stream1 is not active.
1 = Data stream1 is active.
Data Stream0 Active/Inactive
Active0 0 = Data stream0 is not active.
1 = Data stream0 is active.
Data Stream3 Error Interrupt Flag Specifies the data stream3 error-
ErrorInt3
interrupt flag.
Data Stream2 Error Interrupt Flag Specifies the data stream2 error-
ErrorInt2
interrupt flag.
Data Stream1 Error Interrupt Flag Specifies the data stream1 error-
ErrorInt1
interrupt flag.
Data Stream0 Error Interrupt Flag Specifies the data stream0 error-
ErrorInt0
interrupt flag.
Int3 Data Stream3 Interrupt Flag Specifies the data stream3 interrupt flag.
Int2 Data Stream2 Interrupt Flag Specifies the data stream2 interrupt flag.
Int1 Data Stream1 Interrupt Flag Specifies the data stream1 interrupt flag.
Int0 Data Stream0 Interrupt Flag Specifies the data stream0 interrupt flag.
LH75400/01/10/11 (Preliminary) User's Guide
26 25 24 23 22
///
0 0 0 0
R R R R R
10 9 8 7
0 0 0 0
R R R R R
0xFFFE1000 + 0x0F8
FUNCTION
7/15/03
21 20 19 18
0 0 0 0 0
R R R R
6 5 4 3 2
Int3 Int2
0 0 0 0 0
R R R R
17 16
0 0
R R
1 0
Int1 Int0
0 0
R R