Gate Array Pin Descriptions (Ssc2571F0B) - Casio SF-7900E Service Manual & Parts List

Pin No. Name
57 MS2
58 OEO
59 BZ1
60 OTP
61 BZ2
62 SWO
63 VH4(VCC)
64 TXO
Gate array pin descriptions (SSC2571F0B): Used in SF-8900
Pin No. Name
1 VSS1
2 OSO
3 OSI
4 VL1
5~10 A0~3,A14,15
11 FE
12 CS1
13 CS2
14 CS3
15 OEI
16 VSS(GND)
17 VH1(VCC)
18 TXI
19 WEI
20 GC
21 IO0
22 DT
23 IO1
24 VIN
25 IO2
26 KON
27 IO3
28 VOB
29 IO4
30 INT
31 VH2(VCC)
32 VL2(VLL)
33 VSS(GND)
34 BBC
35 PDN
36 IO5
37 LRAM
38 CM32
39 IO6
40 RA16
41 IO7
42 RA17
43 RA18
44 MS3
45 RA19
In/Out Description
Out Not used
Out Output enable for ROM
Out Buzzer signal
In Connected to GND
Out Buzzer signal
Out Main switch control signal
In 9V input
Out Transmission data output terminal
In/Out Description
In GND terminal
Out Clock out
In Clock in
In 6V input
In Address input
In Chip select signal from CPU
In Chip select signal from CPU
In Chip select signal from CPU
In Chip select signal from CPU
In Output enable signal from CPU
In GND terminal
In 9V input
In Transmission data input from CPU
In Write enable signal from CPU
In GC signal from CPU
In/Out Data bus line
In DT signal input
In/Out Data bus line
In Power ON signal from CPU (V2ON)
In/Out Data bus line
Out Switch control signal
In/Out Data bus line
Out Inverted signal for VIN
In/Out Data bus line
Out Interrupt signal
In 9V input
In 6V input
In GND terminal
Out Not used
In Power down detection input
In/Out Data bus line
Out Connected to 9V
Out Connected to GND
In/Out Data bus line
Out Inverted signal for VIN
In/Out Data bus line
Out Address bus output
Out Address bus output
Out Not used
Out Not used
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